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@@ -0,0 +1,704 @@
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+// Copyright 2016 The Go Authors. All rights reserved.
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+// Use of this source code is governed by a BSD-style
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+// license that can be found in the LICENSE file.
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+
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+package bpf
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+
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+import "fmt"
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+
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+// An Instruction is one instruction executed by the BPF virtual
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+// machine.
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+type Instruction interface {
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+ // Assemble assembles the Instruction into a RawInstruction.
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+ Assemble() (RawInstruction, error)
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+}
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+
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+// A RawInstruction is a raw BPF virtual machine instruction.
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+type RawInstruction struct {
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+ // Operation to execute.
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+ Op uint16
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+ // For conditional jump instructions, the number of instructions
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+ // to skip if the condition is true/false.
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+ Jt uint8
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+ Jf uint8
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+ // Constant parameter. The meaning depends on the Op.
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+ K uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (ri RawInstruction) Assemble() (RawInstruction, error) { return ri, nil }
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+
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+// Disassemble parses ri into an Instruction and returns it. If ri is
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+// not recognized by this package, ri itself is returned.
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+func (ri RawInstruction) Disassemble() Instruction {
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+ switch ri.Op & opMaskCls {
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+ case opClsLoadA, opClsLoadX:
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+ reg := Register(ri.Op & opMaskLoadDest)
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+ sz := 0
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+ switch ri.Op & opMaskLoadWidth {
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+ case opLoadWidth4:
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+ sz = 4
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+ case opLoadWidth2:
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+ sz = 2
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+ case opLoadWidth1:
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+ sz = 1
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+ default:
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+ return ri
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+ }
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+ switch ri.Op & opMaskLoadMode {
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+ case opAddrModeImmediate:
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+ if sz != 4 {
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+ return ri
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+ }
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+ return LoadConstant{Dst: reg, Val: ri.K}
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+ case opAddrModeScratch:
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+ if sz != 4 || ri.K > 15 {
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+ return ri
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+ }
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+ return LoadScratch{Dst: reg, N: int(ri.K)}
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+ case opAddrModeAbsolute:
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+ if ri.K > extOffset+0xffffffff {
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+ return LoadExtension{Num: Extension(-extOffset + ri.K)}
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+ }
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+ return LoadAbsolute{Size: sz, Off: ri.K}
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+ case opAddrModeIndirect:
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+ return LoadIndirect{Size: sz, Off: ri.K}
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+ case opAddrModePacketLen:
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+ if sz != 4 {
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+ return ri
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+ }
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+ return LoadExtension{Num: ExtLen}
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+ case opAddrModeMemShift:
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+ return LoadMemShift{Off: ri.K}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsStoreA:
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+ if ri.Op != opClsStoreA || ri.K > 15 {
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+ return ri
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+ }
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+ return StoreScratch{Src: RegA, N: int(ri.K)}
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+
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+ case opClsStoreX:
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+ if ri.Op != opClsStoreX || ri.K > 15 {
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+ return ri
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+ }
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+ return StoreScratch{Src: RegX, N: int(ri.K)}
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+
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+ case opClsALU:
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+ switch op := ALUOp(ri.Op & opMaskOperator); op {
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+ case ALUOpAdd, ALUOpSub, ALUOpMul, ALUOpDiv, ALUOpOr, ALUOpAnd, ALUOpShiftLeft, ALUOpShiftRight, ALUOpMod, ALUOpXor:
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+ if ri.Op&opMaskOperandSrc != 0 {
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+ return ALUOpX{Op: op}
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+ }
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+ return ALUOpConstant{Op: op, Val: ri.K}
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+ case aluOpNeg:
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+ return NegateA{}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsJump:
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+ if ri.Op&opMaskJumpConst != opClsJump {
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+ return ri
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+ }
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+ switch ri.Op & opMaskJumpCond {
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+ case opJumpAlways:
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+ return Jump{Skip: ri.K}
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+ case opJumpEqual:
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+ if ri.Jt == 0 {
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+ return JumpIf{
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+ Cond: JumpNotEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jf,
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+ SkipFalse: 0,
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+ }
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+ }
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+ return JumpIf{
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+ Cond: JumpEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpGT:
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+ if ri.Jt == 0 {
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+ return JumpIf{
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+ Cond: JumpLessOrEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jf,
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+ SkipFalse: 0,
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+ }
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+ }
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+ return JumpIf{
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+ Cond: JumpGreaterThan,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpGE:
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+ if ri.Jt == 0 {
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+ return JumpIf{
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+ Cond: JumpLessThan,
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+ Val: ri.K,
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+ SkipTrue: ri.Jf,
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+ SkipFalse: 0,
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+ }
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+ }
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+ return JumpIf{
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+ Cond: JumpGreaterOrEqual,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ case opJumpSet:
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+ return JumpIf{
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+ Cond: JumpBitsSet,
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+ Val: ri.K,
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+ SkipTrue: ri.Jt,
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+ SkipFalse: ri.Jf,
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+ }
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+ default:
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+ return ri
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+ }
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+
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+ case opClsReturn:
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+ switch ri.Op {
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+ case opClsReturn | opRetSrcA:
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+ return RetA{}
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+ case opClsReturn | opRetSrcConstant:
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+ return RetConstant{Val: ri.K}
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+ default:
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+ return ri
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+ }
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+
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+ case opClsMisc:
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+ switch ri.Op {
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+ case opClsMisc | opMiscTAX:
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+ return TAX{}
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+ case opClsMisc | opMiscTXA:
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+ return TXA{}
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+ default:
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+ return ri
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+ }
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+
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+ default:
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+ panic("unreachable") // switch is exhaustive on the bit pattern
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+ }
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+}
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+
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+// LoadConstant loads Val into register Dst.
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+type LoadConstant struct {
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+ Dst Register
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+ Val uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadConstant) Assemble() (RawInstruction, error) {
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+ return assembleLoad(a.Dst, 4, opAddrModeImmediate, a.Val)
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadConstant) String() string {
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+ switch a.Dst {
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+ case RegA:
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+ return fmt.Sprintf("ld #%d", a.Val)
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+ case RegX:
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+ return fmt.Sprintf("ldx #%d", a.Val)
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+ default:
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+ }
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+}
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+
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+// LoadScratch loads scratch[N] into register Dst.
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+type LoadScratch struct {
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+ Dst Register
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+ N int // 0-15
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadScratch) Assemble() (RawInstruction, error) {
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+ if a.N < 0 || a.N > 15 {
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+ return RawInstruction{}, fmt.Errorf("invalid scratch slot %d", a.N)
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+ }
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+ return assembleLoad(a.Dst, 4, opAddrModeScratch, uint32(a.N))
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadScratch) String() string {
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+ switch a.Dst {
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+ case RegA:
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+ return fmt.Sprintf("ld M[%d]", a.N)
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+ case RegX:
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+ return fmt.Sprintf("ldx M[%d]", a.N)
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+ default:
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+ }
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+}
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+
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+// LoadAbsolute loads packet[Off:Off+Size] as an integer value into
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+// register A.
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+type LoadAbsolute struct {
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+ Off uint32
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+ Size int // 1, 2 or 4
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadAbsolute) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegA, a.Size, opAddrModeAbsolute, a.Off)
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadAbsolute) String() string {
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+ switch a.Size {
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+ case 1: // byte
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+ return fmt.Sprintf("ldb [%d]", a.Off)
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+ case 2: // half word
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+ return fmt.Sprintf("ldh [%d]", a.Off)
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+ case 4: // word
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+ if a.Off > extOffset+0xffffffff {
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+ return LoadExtension{Num: Extension(a.Off + 0x1000)}.String()
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+ }
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+ return fmt.Sprintf("ld [%d]", a.Off)
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+ default:
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+ }
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+}
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+
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+// LoadIndirect loads packet[X+Off:X+Off+Size] as an integer value
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+// into register A.
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+type LoadIndirect struct {
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+ Off uint32
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+ Size int // 1, 2 or 4
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadIndirect) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegA, a.Size, opAddrModeIndirect, a.Off)
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadIndirect) String() string {
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+ switch a.Size {
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+ case 1: // byte
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+ return fmt.Sprintf("ldb [x + %d]", a.Off)
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+ case 2: // half word
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+ return fmt.Sprintf("ldh [x + %d]", a.Off)
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+ case 4: // word
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+ return fmt.Sprintf("ld [x + %d]", a.Off)
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+ default:
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+ }
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+}
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+
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+// LoadMemShift multiplies the first 4 bits of the byte at packet[Off]
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+// by 4 and stores the result in register X.
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+//
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+// This instruction is mainly useful to load into X the length of an
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+// IPv4 packet header in a single instruction, rather than have to do
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+// the arithmetic on the header's first byte by hand.
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+type LoadMemShift struct {
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+ Off uint32
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadMemShift) Assemble() (RawInstruction, error) {
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+ return assembleLoad(RegX, 1, opAddrModeMemShift, a.Off)
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadMemShift) String() string {
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+ return fmt.Sprintf("ldx 4*([%d]&0xf)", a.Off)
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+}
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+
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+// LoadExtension invokes a linux-specific extension and stores the
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+// result in register A.
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+type LoadExtension struct {
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+ Num Extension
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a LoadExtension) Assemble() (RawInstruction, error) {
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+ if a.Num == ExtLen {
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+ return assembleLoad(RegA, 4, opAddrModePacketLen, 0)
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+ }
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+ return assembleLoad(RegA, 4, opAddrModeAbsolute, uint32(extOffset+a.Num))
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+}
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+
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+// String returns the instruction in assembler notation.
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+func (a LoadExtension) String() string {
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+ switch a.Num {
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+ case ExtLen:
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+ return "ld #len"
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+ case ExtProto:
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+ return "ld #proto"
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+ case ExtType:
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+ return "ld #type"
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+ case ExtPayloadOffset:
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+ return "ld #poff"
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+ case ExtInterfaceIndex:
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+ return "ld #ifidx"
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+ case ExtNetlinkAttr:
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+ return "ld #nla"
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+ case ExtNetlinkAttrNested:
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+ return "ld #nlan"
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+ case ExtMark:
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+ return "ld #mark"
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+ case ExtQueue:
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+ return "ld #queue"
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+ case ExtLinkLayerType:
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+ return "ld #hatype"
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+ case ExtRXHash:
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+ return "ld #rxhash"
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+ case ExtCPUID:
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+ return "ld #cpu"
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+ case ExtVLANTag:
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+ return "ld #vlan_tci"
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+ case ExtVLANTagPresent:
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+ return "ld #vlan_avail"
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+ case ExtVLANProto:
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+ return "ld #vlan_tpid"
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+ case ExtRand:
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+ return "ld #rand"
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+ default:
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+ }
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+}
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+
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+// StoreScratch stores register Src into scratch[N].
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+type StoreScratch struct {
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+ Src Register
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+ N int // 0-15
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+}
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+
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+// Assemble implements the Instruction Assemble method.
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+func (a StoreScratch) Assemble() (RawInstruction, error) {
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|
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+ if a.N < 0 || a.N > 15 {
|
|
|
|
+ return RawInstruction{}, fmt.Errorf("invalid scratch slot %d", a.N)
|
|
|
|
+ }
|
|
|
|
+ var op uint16
|
|
|
|
+ switch a.Src {
|
|
|
|
+ case RegA:
|
|
|
|
+ op = opClsStoreA
|
|
|
|
+ case RegX:
|
|
|
|
+ op = opClsStoreX
|
|
|
|
+ default:
|
|
|
|
+ return RawInstruction{}, fmt.Errorf("invalid source register %v", a.Src)
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: op,
|
|
|
|
+ K: uint32(a.N),
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a StoreScratch) String() string {
|
|
|
|
+ switch a.Src {
|
|
|
|
+ case RegA:
|
|
|
|
+ return fmt.Sprintf("st M[%d]", a.N)
|
|
|
|
+ case RegX:
|
|
|
|
+ return fmt.Sprintf("stx M[%d]", a.N)
|
|
|
|
+ default:
|
|
|
|
+ return fmt.Sprintf("unknown instruction: %#v", a)
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// ALUOpConstant executes A = A <Op> Val.
|
|
|
|
+type ALUOpConstant struct {
|
|
|
|
+ Op ALUOp
|
|
|
|
+ Val uint32
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a ALUOpConstant) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsALU | opALUSrcConstant | uint16(a.Op),
|
|
|
|
+ K: a.Val,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a ALUOpConstant) String() string {
|
|
|
|
+ switch a.Op {
|
|
|
|
+ case ALUOpAdd:
|
|
|
|
+ return fmt.Sprintf("add #%d", a.Val)
|
|
|
|
+ case ALUOpSub:
|
|
|
|
+ return fmt.Sprintf("sub #%d", a.Val)
|
|
|
|
+ case ALUOpMul:
|
|
|
|
+ return fmt.Sprintf("mul #%d", a.Val)
|
|
|
|
+ case ALUOpDiv:
|
|
|
|
+ return fmt.Sprintf("div #%d", a.Val)
|
|
|
|
+ case ALUOpMod:
|
|
|
|
+ return fmt.Sprintf("mod #%d", a.Val)
|
|
|
|
+ case ALUOpAnd:
|
|
|
|
+ return fmt.Sprintf("and #%d", a.Val)
|
|
|
|
+ case ALUOpOr:
|
|
|
|
+ return fmt.Sprintf("or #%d", a.Val)
|
|
|
|
+ case ALUOpXor:
|
|
|
|
+ return fmt.Sprintf("xor #%d", a.Val)
|
|
|
|
+ case ALUOpShiftLeft:
|
|
|
|
+ return fmt.Sprintf("lsh #%d", a.Val)
|
|
|
|
+ case ALUOpShiftRight:
|
|
|
|
+ return fmt.Sprintf("rsh #%d", a.Val)
|
|
|
|
+ default:
|
|
|
|
+ return fmt.Sprintf("unknown instruction: %#v", a)
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// ALUOpX executes A = A <Op> X
|
|
|
|
+type ALUOpX struct {
|
|
|
|
+ Op ALUOp
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a ALUOpX) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsALU | opALUSrcX | uint16(a.Op),
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a ALUOpX) String() string {
|
|
|
|
+ switch a.Op {
|
|
|
|
+ case ALUOpAdd:
|
|
|
|
+ return "add x"
|
|
|
|
+ case ALUOpSub:
|
|
|
|
+ return "sub x"
|
|
|
|
+ case ALUOpMul:
|
|
|
|
+ return "mul x"
|
|
|
|
+ case ALUOpDiv:
|
|
|
|
+ return "div x"
|
|
|
|
+ case ALUOpMod:
|
|
|
|
+ return "mod x"
|
|
|
|
+ case ALUOpAnd:
|
|
|
|
+ return "and x"
|
|
|
|
+ case ALUOpOr:
|
|
|
|
+ return "or x"
|
|
|
|
+ case ALUOpXor:
|
|
|
|
+ return "xor x"
|
|
|
|
+ case ALUOpShiftLeft:
|
|
|
|
+ return "lsh x"
|
|
|
|
+ case ALUOpShiftRight:
|
|
|
|
+ return "rsh x"
|
|
|
|
+ default:
|
|
|
|
+ return fmt.Sprintf("unknown instruction: %#v", a)
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// NegateA executes A = -A.
|
|
|
|
+type NegateA struct{}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a NegateA) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsALU | uint16(aluOpNeg),
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a NegateA) String() string {
|
|
|
|
+ return fmt.Sprintf("neg")
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Jump skips the following Skip instructions in the program.
|
|
|
|
+type Jump struct {
|
|
|
|
+ Skip uint32
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a Jump) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsJump | opJumpAlways,
|
|
|
|
+ K: a.Skip,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a Jump) String() string {
|
|
|
|
+ return fmt.Sprintf("ja %d", a.Skip)
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// JumpIf skips the following Skip instructions in the program if A
|
|
|
|
+// <Cond> Val is true.
|
|
|
|
+type JumpIf struct {
|
|
|
|
+ Cond JumpTest
|
|
|
|
+ Val uint32
|
|
|
|
+ SkipTrue uint8
|
|
|
|
+ SkipFalse uint8
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a JumpIf) Assemble() (RawInstruction, error) {
|
|
|
|
+ var (
|
|
|
|
+ cond uint16
|
|
|
|
+ flip bool
|
|
|
|
+ )
|
|
|
|
+ switch a.Cond {
|
|
|
|
+ case JumpEqual:
|
|
|
|
+ cond = opJumpEqual
|
|
|
|
+ case JumpNotEqual:
|
|
|
|
+ cond, flip = opJumpEqual, true
|
|
|
|
+ case JumpGreaterThan:
|
|
|
|
+ cond = opJumpGT
|
|
|
|
+ case JumpLessThan:
|
|
|
|
+ cond, flip = opJumpGE, true
|
|
|
|
+ case JumpGreaterOrEqual:
|
|
|
|
+ cond = opJumpGE
|
|
|
|
+ case JumpLessOrEqual:
|
|
|
|
+ cond, flip = opJumpGT, true
|
|
|
|
+ case JumpBitsSet:
|
|
|
|
+ cond = opJumpSet
|
|
|
|
+ case JumpBitsNotSet:
|
|
|
|
+ cond, flip = opJumpSet, true
|
|
|
|
+ default:
|
|
|
|
+ return RawInstruction{}, fmt.Errorf("unknown JumpTest %v", a.Cond)
|
|
|
|
+ }
|
|
|
|
+ jt, jf := a.SkipTrue, a.SkipFalse
|
|
|
|
+ if flip {
|
|
|
|
+ jt, jf = jf, jt
|
|
|
|
+ }
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsJump | cond,
|
|
|
|
+ Jt: jt,
|
|
|
|
+ Jf: jf,
|
|
|
|
+ K: a.Val,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a JumpIf) String() string {
|
|
|
|
+ switch a.Cond {
|
|
|
|
+ // K == A
|
|
|
|
+ case JumpEqual:
|
|
|
|
+ return conditionalJump(a, "jeq", "jneq")
|
|
|
|
+ // K != A
|
|
|
|
+ case JumpNotEqual:
|
|
|
|
+ return fmt.Sprintf("jneq #%d,%d", a.Val, a.SkipTrue)
|
|
|
|
+ // K > A
|
|
|
|
+ case JumpGreaterThan:
|
|
|
|
+ return conditionalJump(a, "jgt", "jle")
|
|
|
|
+ // K < A
|
|
|
|
+ case JumpLessThan:
|
|
|
|
+ return fmt.Sprintf("jlt #%d,%d", a.Val, a.SkipTrue)
|
|
|
|
+ // K >= A
|
|
|
|
+ case JumpGreaterOrEqual:
|
|
|
|
+ return conditionalJump(a, "jge", "jlt")
|
|
|
|
+ // K <= A
|
|
|
|
+ case JumpLessOrEqual:
|
|
|
|
+ return fmt.Sprintf("jle #%d,%d", a.Val, a.SkipTrue)
|
|
|
|
+ // K & A != 0
|
|
|
|
+ case JumpBitsSet:
|
|
|
|
+ if a.SkipFalse > 0 {
|
|
|
|
+ return fmt.Sprintf("jset #%d,%d,%d", a.Val, a.SkipTrue, a.SkipFalse)
|
|
|
|
+ }
|
|
|
|
+ return fmt.Sprintf("jset #%d,%d", a.Val, a.SkipTrue)
|
|
|
|
+ // K & A == 0, there is no assembler instruction for JumpBitNotSet, use JumpBitSet and invert skips
|
|
|
|
+ case JumpBitsNotSet:
|
|
|
|
+ return JumpIf{Cond: JumpBitsSet, SkipTrue: a.SkipFalse, SkipFalse: a.SkipTrue, Val: a.Val}.String()
|
|
|
|
+ default:
|
|
|
|
+ return fmt.Sprintf("unknown instruction: %#v", a)
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+func conditionalJump(inst JumpIf, positiveJump, negativeJump string) string {
|
|
|
|
+ if inst.SkipTrue > 0 {
|
|
|
|
+ if inst.SkipFalse > 0 {
|
|
|
|
+ return fmt.Sprintf("%s #%d,%d,%d", positiveJump, inst.Val, inst.SkipTrue, inst.SkipFalse)
|
|
|
|
+ }
|
|
|
|
+ return fmt.Sprintf("%s #%d,%d", positiveJump, inst.Val, inst.SkipTrue)
|
|
|
|
+ }
|
|
|
|
+ return fmt.Sprintf("%s #%d,%d", negativeJump, inst.Val, inst.SkipFalse)
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// RetA exits the BPF program, returning the value of register A.
|
|
|
|
+type RetA struct{}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a RetA) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsReturn | opRetSrcA,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a RetA) String() string {
|
|
|
|
+ return fmt.Sprintf("ret a")
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// RetConstant exits the BPF program, returning a constant value.
|
|
|
|
+type RetConstant struct {
|
|
|
|
+ Val uint32
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a RetConstant) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsReturn | opRetSrcConstant,
|
|
|
|
+ K: a.Val,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a RetConstant) String() string {
|
|
|
|
+ return fmt.Sprintf("ret #%d", a.Val)
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// TXA copies the value of register X to register A.
|
|
|
|
+type TXA struct{}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a TXA) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsMisc | opMiscTXA,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a TXA) String() string {
|
|
|
|
+ return fmt.Sprintf("txa")
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// TAX copies the value of register A to register X.
|
|
|
|
+type TAX struct{}
|
|
|
|
+
|
|
|
|
+// Assemble implements the Instruction Assemble method.
|
|
|
|
+func (a TAX) Assemble() (RawInstruction, error) {
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: opClsMisc | opMiscTAX,
|
|
|
|
+ }, nil
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+// String returns the instruction in assembler notation.
|
|
|
|
+func (a TAX) String() string {
|
|
|
|
+ return fmt.Sprintf("tax")
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+func assembleLoad(dst Register, loadSize int, mode uint16, k uint32) (RawInstruction, error) {
|
|
|
|
+ var (
|
|
|
|
+ cls uint16
|
|
|
|
+ sz uint16
|
|
|
|
+ )
|
|
|
|
+ switch dst {
|
|
|
|
+ case RegA:
|
|
|
|
+ cls = opClsLoadA
|
|
|
|
+ case RegX:
|
|
|
|
+ cls = opClsLoadX
|
|
|
|
+ default:
|
|
|
|
+ return RawInstruction{}, fmt.Errorf("invalid target register %v", dst)
|
|
|
|
+ }
|
|
|
|
+ switch loadSize {
|
|
|
|
+ case 1:
|
|
|
|
+ sz = opLoadWidth1
|
|
|
|
+ case 2:
|
|
|
|
+ sz = opLoadWidth2
|
|
|
|
+ case 4:
|
|
|
|
+ sz = opLoadWidth4
|
|
|
|
+ default:
|
|
|
|
+ return RawInstruction{}, fmt.Errorf("invalid load byte length %d", sz)
|
|
|
|
+ }
|
|
|
|
+ return RawInstruction{
|
|
|
|
+ Op: cls | sz | mode,
|
|
|
|
+ K: k,
|
|
|
|
+ }, nil
|
|
|
|
+}
|