stm32f1xx_ll_sdmmc.c 48 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @brief SDIO Low Layer HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the SDIO peripheral:
  9. * + Initialization/de-initialization functions
  10. * + I/O operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### SDMMC peripheral features #####
  17. ==============================================================================
  18. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  19. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  20. devices.
  21. [..] The SDMMC features include the following:
  22. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  23. for three different databus modes: 1-bit (default), 4-bit and 8-bit
  24. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  25. (+) Full compliance with SD Memory Card Specifications Version 2.0
  26. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  27. different data bus modes: 1-bit (default) and 4-bit
  28. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  29. Rev1.1)
  30. (+) Data transfer up to 48 MHz for the 8 bit mode
  31. (+) Data and command output enable signals to control external bidirectional drivers.
  32. ##### How to use this driver #####
  33. ==============================================================================
  34. [..]
  35. This driver is a considered as a driver of service for external devices drivers
  36. that interfaces with the SDMMC peripheral.
  37. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  38. is used in the device's driver to perform SDMMC operations and functionalities.
  39. This driver is almost transparent for the final user, it is only used to implement other
  40. functionalities of the external device.
  41. [..]
  42. (+) The SDIO peripheral uses two clock signals:
  43. (++) SDIO adapter clock (SDIOCLK = HCLK)
  44. (++) AHB bus clock (HCLK/2)
  45. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  46. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  47. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  48. peripheral.
  49. (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
  50. function and disable it using the function SDIO_PowerState_OFF(SDIOx).
  51. (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  52. (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
  53. and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
  54. (+) When using the DMA mode
  55. (++) Configure the DMA in the MSP layer of the external device
  56. (++) Active the needed channel Request
  57. (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  58. __SDIO_DMA_DISABLE().
  59. (+) To control the CPSM (Command Path State Machine) and send
  60. commands to the card use the SDIO_SendCommand(),
  61. SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  62. to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  63. to the selected command to be sent.
  64. The parameters that should be filled are:
  65. (++) Command Argument
  66. (++) Command Index
  67. (++) Command Response type
  68. (++) Command Wait
  69. (++) CPSM Status (Enable or Disable).
  70. -@@- To check if the command is well received, read the SDIO_CMDRESP
  71. register using the SDIO_GetCommandResponse().
  72. The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  73. SDIO_GetResponse() function.
  74. (+) To control the DPSM (Data Path State Machine) and send/receive
  75. data to/from the card use the SDIO_ConfigData(), SDIO_GetDataCounter(),
  76. SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
  77. *** Read Operations ***
  78. =======================
  79. [..]
  80. (#) First, user has to fill the data structure (pointer to
  81. SDIO_DataInitTypeDef) according to the selected data type to be received.
  82. The parameters that should be filled are:
  83. (++) Data TimeOut
  84. (++) Data Length
  85. (++) Data Block size
  86. (++) Data Transfer direction: should be from card (To SDMMC)
  87. (++) Data Transfer mode
  88. (++) DPSM Status (Enable or Disable)
  89. (#) Configure the SDMMC resources to receive the data from the card
  90. according to selected transfer mode (Refer to Step 8, 9 and 10).
  91. (#) Send the selected Read command (refer to step 11).
  92. (#) Use the SDIO flags/interrupts to check the transfer status.
  93. *** Write Operations ***
  94. ========================
  95. [..]
  96. (#) First, user has to fill the data structure (pointer to
  97. SDIO_DataInitTypeDef) according to the selected data type to be received.
  98. The parameters that should be filled are:
  99. (++) Data TimeOut
  100. (++) Data Length
  101. (++) Data Block size
  102. (++) Data Transfer direction: should be to card (To CARD)
  103. (++) Data Transfer mode
  104. (++) DPSM Status (Enable or Disable)
  105. (#) Configure the SDMMC resources to send the data to the card according to
  106. selected transfer mode.
  107. (#) Send the selected Write command.
  108. (#) Use the SDIO flags/interrupts to check the transfer status.
  109. *** Command management operations ***
  110. =====================================
  111. [..]
  112. (#) The commands used for Read/Write//Erase operations are managed in
  113. separate functions.
  114. Each function allows to send the needed command with the related argument,
  115. then check the response.
  116. By the same approach, you could implement a command and check the response.
  117. @endverbatim
  118. ******************************************************************************
  119. * @attention
  120. *
  121. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  122. *
  123. * Redistribution and use in source and binary forms, with or without modification,
  124. * are permitted provided that the following conditions are met:
  125. * 1. Redistributions of source code must retain the above copyright notice,
  126. * this list of conditions and the following disclaimer.
  127. * 2. Redistributions in binary form must reproduce the above copyright notice,
  128. * this list of conditions and the following disclaimer in the documentation
  129. * and/or other materials provided with the distribution.
  130. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  131. * may be used to endorse or promote products derived from this software
  132. * without specific prior written permission.
  133. *
  134. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  135. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  136. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  137. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  138. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  139. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  140. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  141. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  142. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  143. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  144. *
  145. ******************************************************************************
  146. */
  147. /* Includes ------------------------------------------------------------------*/
  148. #include "stm32f1xx_hal.h"
  149. #if defined(STM32F103xE) || defined(STM32F103xG)
  150. /** @addtogroup STM32F1xx_HAL_Driver
  151. * @{
  152. */
  153. /** @defgroup SDMMC_LL SDMMC Low Layer
  154. * @brief Low layer module for SD
  155. * @{
  156. */
  157. #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
  158. /* Private typedef -----------------------------------------------------------*/
  159. /* Private define ------------------------------------------------------------*/
  160. /* Private macro -------------------------------------------------------------*/
  161. /* Private variables ---------------------------------------------------------*/
  162. /* Private function prototypes -----------------------------------------------*/
  163. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
  164. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout);
  165. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx);
  166. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx);
  167. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx);
  168. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA);
  169. /* Exported functions --------------------------------------------------------*/
  170. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  171. * @{
  172. */
  173. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  174. * @brief Initialization and Configuration functions
  175. *
  176. @verbatim
  177. ===============================================================================
  178. ##### Initialization/de-initialization functions #####
  179. ===============================================================================
  180. [..] This section provides functions allowing to:
  181. @endverbatim
  182. * @{
  183. */
  184. /**
  185. * @brief Initializes the SDMMC according to the specified
  186. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  187. * @param SDIOx: Pointer to SDMMC register base
  188. * @param Init: SDMMC initialization structure
  189. * @retval HAL status
  190. */
  191. HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
  192. {
  193. uint32_t tmpreg = 0U;
  194. /* Check the parameters */
  195. assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
  196. assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
  197. assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
  198. assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  199. assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
  200. assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  201. assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
  202. /* Set SDMMC configuration parameters */
  203. tmpreg |= (Init.ClockEdge |\
  204. Init.ClockBypass |\
  205. Init.ClockPowerSave |\
  206. Init.BusWide |\
  207. Init.HardwareFlowControl |\
  208. Init.ClockDiv
  209. );
  210. /* Write to SDMMC CLKCR */
  211. MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
  212. return HAL_OK;
  213. }
  214. /**
  215. * @}
  216. */
  217. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  218. * @brief Data transfers functions
  219. *
  220. @verbatim
  221. ===============================================================================
  222. ##### I/O operation functions #####
  223. ===============================================================================
  224. [..]
  225. This subsection provides a set of functions allowing to manage the SDMMC data
  226. transfers.
  227. @endverbatim
  228. * @{
  229. */
  230. /**
  231. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  232. * @param SDIOx: Pointer to SDMMC register base
  233. * @retval HAL status
  234. */
  235. uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
  236. {
  237. /* Read data from Rx FIFO */
  238. return (SDIOx->FIFO);
  239. }
  240. /**
  241. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  242. * @param SDIOx: Pointer to SDMMC register base
  243. * @param pWriteData: pointer to data to write
  244. * @retval HAL status
  245. */
  246. HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
  247. {
  248. /* Write data to FIFO */
  249. SDIOx->FIFO = *pWriteData;
  250. return HAL_OK;
  251. }
  252. /**
  253. * @}
  254. */
  255. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  256. * @brief management functions
  257. *
  258. @verbatim
  259. ===============================================================================
  260. ##### Peripheral Control functions #####
  261. ===============================================================================
  262. [..]
  263. This subsection provides a set of functions allowing to control the SDMMC data
  264. transfers.
  265. @endverbatim
  266. * @{
  267. */
  268. /**
  269. * @brief Set SDMMC Power state to ON.
  270. * @param SDIOx: Pointer to SDMMC register base
  271. * @retval HAL status
  272. */
  273. HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
  274. {
  275. /* Set power state to ON */
  276. SDIOx->POWER = SDIO_POWER_PWRCTRL;
  277. return HAL_OK;
  278. }
  279. /**
  280. * @brief Set SDMMC Power state to OFF.
  281. * @param SDIOx: Pointer to SDMMC register base
  282. * @retval HAL status
  283. */
  284. HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
  285. {
  286. /* Set power state to OFF */
  287. SDIOx->POWER = 0x00000000U;
  288. return HAL_OK;
  289. }
  290. /**
  291. * @brief Get SDMMC Power state.
  292. * @param SDIOx: Pointer to SDMMC register base
  293. * @retval Power status of the controller. The returned value can be one of the
  294. * following values:
  295. * - 0x00: Power OFF
  296. * - 0x02: Power UP
  297. * - 0x03: Power ON
  298. */
  299. uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
  300. {
  301. return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
  302. }
  303. /**
  304. * @brief Configure the SDMMC command path according to the specified parameters in
  305. * SDIO_CmdInitTypeDef structure and send the command
  306. * @param SDIOx: Pointer to SDMMC register base
  307. * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
  308. * the configuration information for the SDMMC command
  309. * @retval HAL status
  310. */
  311. HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
  312. {
  313. uint32_t tmpreg = 0U;
  314. /* Check the parameters */
  315. assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
  316. assert_param(IS_SDIO_RESPONSE(Command->Response));
  317. assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
  318. assert_param(IS_SDIO_CPSM(Command->CPSM));
  319. /* Set the SDMMC Argument value */
  320. SDIOx->ARG = Command->Argument;
  321. /* Set SDMMC command parameters */
  322. tmpreg |= (uint32_t)(Command->CmdIndex |\
  323. Command->Response |\
  324. Command->WaitForInterrupt |\
  325. Command->CPSM);
  326. /* Write to SDMMC CMD register */
  327. MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
  328. return HAL_OK;
  329. }
  330. /**
  331. * @brief Return the command index of last command for which response received
  332. * @param SDIOx: Pointer to SDMMC register base
  333. * @retval Command index of the last command response received
  334. */
  335. uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
  336. {
  337. return (uint8_t)(SDIOx->RESPCMD);
  338. }
  339. /**
  340. * @brief Return the response received from the card for the last command
  341. * @param SDIOx: Pointer to SDMMC register base
  342. * @param Response: Specifies the SDMMC response register.
  343. * This parameter can be one of the following values:
  344. * @arg SDIO_RESP1: Response Register 1
  345. * @arg SDIO_RESP2: Response Register 2
  346. * @arg SDIO_RESP3: Response Register 3
  347. * @arg SDIO_RESP4: Response Register 4
  348. * @retval The Corresponding response register value
  349. */
  350. uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
  351. {
  352. __IO uint32_t tmp = 0U;
  353. /* Check the parameters */
  354. assert_param(IS_SDIO_RESP(Response));
  355. /* Get the response */
  356. tmp = (uint32_t)&(SDIOx->RESP1) + Response;
  357. return (*(__IO uint32_t *) tmp);
  358. }
  359. /**
  360. * @brief Configure the SDMMC data path according to the specified
  361. * parameters in the SDIO_DataInitTypeDef.
  362. * @param SDIOx: Pointer to SDMMC register base
  363. * @param Data : pointer to a SDIO_DataInitTypeDef structure
  364. * that contains the configuration information for the SDMMC data.
  365. * @retval HAL status
  366. */
  367. HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
  368. {
  369. uint32_t tmpreg = 0U;
  370. /* Check the parameters */
  371. assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
  372. assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
  373. assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
  374. assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
  375. assert_param(IS_SDIO_DPSM(Data->DPSM));
  376. /* Set the SDMMC Data TimeOut value */
  377. SDIOx->DTIMER = Data->DataTimeOut;
  378. /* Set the SDMMC DataLength value */
  379. SDIOx->DLEN = Data->DataLength;
  380. /* Set the SDMMC data configuration parameters */
  381. tmpreg |= (uint32_t)(Data->DataBlockSize |\
  382. Data->TransferDir |\
  383. Data->TransferMode |\
  384. Data->DPSM);
  385. /* Write to SDMMC DCTRL */
  386. MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
  387. return HAL_OK;
  388. }
  389. /**
  390. * @brief Returns number of remaining data bytes to be transferred.
  391. * @param SDIOx: Pointer to SDMMC register base
  392. * @retval Number of remaining data bytes to be transferred
  393. */
  394. uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
  395. {
  396. return (SDIOx->DCOUNT);
  397. }
  398. /**
  399. * @brief Get the FIFO data
  400. * @param SDIOx: Pointer to SDMMC register base
  401. * @retval Data received
  402. */
  403. uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
  404. {
  405. return (SDIOx->FIFO);
  406. }
  407. /**
  408. * @brief Sets one of the two options of inserting read wait interval.
  409. * @param SDIOx: Pointer to SDMMC register base
  410. * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode.
  411. * This parameter can be:
  412. * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  413. * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  414. * @retval None
  415. */
  416. HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
  417. {
  418. /* Check the parameters */
  419. assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
  420. /* Set SDMMC read wait mode */
  421. MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
  422. return HAL_OK;
  423. }
  424. /**
  425. * @}
  426. */
  427. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  428. * @brief Data transfers functions
  429. *
  430. @verbatim
  431. ===============================================================================
  432. ##### Commands management functions #####
  433. ===============================================================================
  434. [..]
  435. This subsection provides a set of functions allowing to manage the needed commands.
  436. @endverbatim
  437. * @{
  438. */
  439. /**
  440. * @brief Send the Data Block Lenght command and check the response
  441. * @param SDIOx: Pointer to SDMMC register base
  442. * @retval HAL status
  443. */
  444. uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
  445. {
  446. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  447. uint32_t errorstate = SDMMC_ERROR_NONE;
  448. /* Set Block Size for Card */
  449. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  450. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  451. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  452. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  453. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  454. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  455. /* Check for error conditions */
  456. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
  457. return errorstate;
  458. }
  459. /**
  460. * @brief Send the Read Single Block command and check the response
  461. * @param SDIOx: Pointer to SDMMC register base
  462. * @retval HAL status
  463. */
  464. uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  465. {
  466. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  467. uint32_t errorstate = SDMMC_ERROR_NONE;
  468. /* Set Block Size for Card */
  469. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  470. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  471. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  472. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  473. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  474. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  475. /* Check for error conditions */
  476. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  477. return errorstate;
  478. }
  479. /**
  480. * @brief Send the Read Multi Block command and check the response
  481. * @param SDIOx: Pointer to SDIO register base
  482. * @retval HAL status
  483. */
  484. uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  485. {
  486. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  487. uint32_t errorstate = SDMMC_ERROR_NONE;
  488. /* Set Block Size for Card */
  489. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  490. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  491. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  492. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  493. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  494. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  495. /* Check for error conditions */
  496. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
  497. return errorstate;
  498. }
  499. /**
  500. * @brief Send the Write Single Block command and check the response
  501. * @param SDIOx: Pointer to SDIO register base
  502. * @retval HAL status
  503. */
  504. uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  505. {
  506. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  507. uint32_t errorstate = SDMMC_ERROR_NONE;
  508. /* Set Block Size for Card */
  509. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  510. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  511. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  512. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  513. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  514. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  515. /* Check for error conditions */
  516. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  517. return errorstate;
  518. }
  519. /**
  520. * @brief Send the Write Multi Block command and check the response
  521. * @param SDIOx: Pointer to SDIO register base
  522. * @retval HAL status
  523. */
  524. uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  525. {
  526. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  527. uint32_t errorstate = SDMMC_ERROR_NONE;
  528. /* Set Block Size for Card */
  529. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  530. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  531. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  532. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  533. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  534. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  535. /* Check for error conditions */
  536. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
  537. return errorstate;
  538. }
  539. /**
  540. * @brief Send the Start Address Erase command for SD and check the response
  541. * @param SDIOx: Pointer to SDIO register base
  542. * @retval HAL status
  543. */
  544. uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  545. {
  546. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  547. uint32_t errorstate = SDMMC_ERROR_NONE;
  548. /* Set Block Size for Card */
  549. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  550. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  551. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  552. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  553. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  554. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  555. /* Check for error conditions */
  556. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  557. return errorstate;
  558. }
  559. /**
  560. * @brief Send the End Address Erase command for SD and check the response
  561. * @param SDIOx: Pointer to SDIO register base
  562. * @retval HAL status
  563. */
  564. uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  565. {
  566. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  567. uint32_t errorstate = SDMMC_ERROR_NONE;
  568. /* Set Block Size for Card */
  569. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  570. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  571. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  572. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  573. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  574. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  575. /* Check for error conditions */
  576. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  577. return errorstate;
  578. }
  579. /**
  580. * @brief Send the Start Address Erase command and check the response
  581. * @param SDIOx: Pointer to SDIO register base
  582. * @retval HAL status
  583. */
  584. uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  585. {
  586. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  587. uint32_t errorstate = SDMMC_ERROR_NONE;
  588. /* Set Block Size for Card */
  589. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  590. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  591. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  592. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  593. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  594. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  595. /* Check for error conditions */
  596. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  597. return errorstate;
  598. }
  599. /**
  600. * @brief Send the End Address Erase command and check the response
  601. * @param SDIOx: Pointer to SDIO register base
  602. * @retval HAL status
  603. */
  604. uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  605. {
  606. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  607. uint32_t errorstate = SDMMC_ERROR_NONE;
  608. /* Set Block Size for Card */
  609. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  610. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  611. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  612. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  613. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  614. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  615. /* Check for error conditions */
  616. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  617. return errorstate;
  618. }
  619. /**
  620. * @brief Send the Erase command and check the response
  621. * @param SDIOx: Pointer to SDIO register base
  622. * @retval HAL status
  623. */
  624. uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
  625. {
  626. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  627. uint32_t errorstate = SDMMC_ERROR_NONE;
  628. /* Set Block Size for Card */
  629. sdmmc_cmdinit.Argument = 0U;
  630. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  631. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  632. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  633. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  634. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  635. /* Check for error conditions */
  636. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT);
  637. return errorstate;
  638. }
  639. /**
  640. * @brief Send the Stop Transfer command and check the response.
  641. * @param SDIOx: Pointer to SDIO register base
  642. * @retval HAL status
  643. */
  644. uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
  645. {
  646. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  647. uint32_t errorstate = SDMMC_ERROR_NONE;
  648. /* Send CMD12 STOP_TRANSMISSION */
  649. sdmmc_cmdinit.Argument = 0U;
  650. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  651. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  652. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  653. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  654. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  655. /* Check for error conditions */
  656. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, 100000000U);
  657. return errorstate;
  658. }
  659. /**
  660. * @brief Send the Select Deselect command and check the response.
  661. * @param SDIOx: Pointer to SDIO register base
  662. * @param addr: Address of the card to be selected
  663. * @retval HAL status
  664. */
  665. uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
  666. {
  667. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  668. uint32_t errorstate = SDMMC_ERROR_NONE;
  669. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  670. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  671. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  672. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  673. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  674. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  675. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  676. /* Check for error conditions */
  677. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
  678. return errorstate;
  679. }
  680. /**
  681. * @brief Send the Go Idle State command and check the response.
  682. * @param SDIOx: Pointer to SDIO register base
  683. * @retval HAL status
  684. */
  685. uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
  686. {
  687. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  688. uint32_t errorstate = SDMMC_ERROR_NONE;
  689. sdmmc_cmdinit.Argument = 0U;
  690. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  691. sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
  692. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  693. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  694. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  695. /* Check for error conditions */
  696. errorstate = SDMMC_GetCmdError(SDIOx);
  697. return errorstate;
  698. }
  699. /**
  700. * @brief Send the Operating Condition command and check the response.
  701. * @param SDIOx: Pointer to SDIO register base
  702. * @retval HAL status
  703. */
  704. uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
  705. {
  706. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  707. uint32_t errorstate = SDMMC_ERROR_NONE;
  708. /* Send CMD8 to verify SD card interface operating condition */
  709. /* Argument: - [31:12]: Reserved (shall be set to '0')
  710. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  711. - [7:0]: Check Pattern (recommended 0xAA) */
  712. /* CMD Response: R7 */
  713. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  714. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  715. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  716. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  717. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  718. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  719. /* Check for error conditions */
  720. errorstate = SDMMC_GetCmdResp7(SDIOx);
  721. return errorstate;
  722. }
  723. /**
  724. * @brief Send the Application command to verify that that the next command
  725. * is an application specific com-mand rather than a standard command
  726. * and check the response.
  727. * @param SDIOx: Pointer to SDIO register base
  728. * @retval HAL status
  729. */
  730. uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  731. {
  732. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  733. uint32_t errorstate = SDMMC_ERROR_NONE;
  734. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  735. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  736. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  737. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  738. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  739. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  740. /* Check for error conditions */
  741. /* If there is a HAL_ERROR, it is a MMC card, else
  742. it is a SD card: SD card 2.0 (voltage range mismatch)
  743. or SD card 1.x */
  744. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
  745. return errorstate;
  746. }
  747. /**
  748. * @brief Send the command asking the accessed card to send its operating
  749. * condition register (OCR)
  750. * @param SDIOx: Pointer to SDIO register base
  751. * @retval HAL status
  752. */
  753. uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType)
  754. {
  755. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  756. uint32_t errorstate = SDMMC_ERROR_NONE;
  757. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | SdType;
  758. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  759. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  760. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  761. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  762. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  763. /* Check for error conditions */
  764. errorstate = SDMMC_GetCmdResp3(SDIOx);
  765. return errorstate;
  766. }
  767. /**
  768. * @brief Send the Bus Width command and check the response.
  769. * @param SDIOx: Pointer to SDIO register base
  770. * @retval HAL status
  771. */
  772. uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
  773. {
  774. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  775. uint32_t errorstate = SDMMC_ERROR_NONE;
  776. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  777. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  778. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  779. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  780. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  781. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  782. /* Check for error conditions */
  783. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
  784. return errorstate;
  785. }
  786. /**
  787. * @brief Send the Send SCR command and check the response.
  788. * @param SDIOx: Pointer to SDMMC register base
  789. * @retval HAL status
  790. */
  791. uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
  792. {
  793. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  794. uint32_t errorstate = SDMMC_ERROR_NONE;
  795. /* Send CMD51 SD_APP_SEND_SCR */
  796. sdmmc_cmdinit.Argument = 0U;
  797. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  798. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  799. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  800. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  801. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  802. /* Check for error conditions */
  803. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
  804. return errorstate;
  805. }
  806. /**
  807. * @brief Send the Send CID command and check the response.
  808. * @param SDIOx: Pointer to SDIO register base
  809. * @retval HAL status
  810. */
  811. uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
  812. {
  813. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  814. uint32_t errorstate = SDMMC_ERROR_NONE;
  815. /* Send CMD2 ALL_SEND_CID */
  816. sdmmc_cmdinit.Argument = 0U;
  817. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  818. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  819. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  820. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  821. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  822. /* Check for error conditions */
  823. errorstate = SDMMC_GetCmdResp2(SDIOx);
  824. return errorstate;
  825. }
  826. /**
  827. * @brief Send the Send CSD command and check the response.
  828. * @param SDIOx: Pointer to SDIO register base
  829. * @retval HAL status
  830. */
  831. uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
  832. {
  833. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  834. uint32_t errorstate = SDMMC_ERROR_NONE;
  835. /* Send CMD9 SEND_CSD */
  836. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  837. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  838. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  839. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  840. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  841. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  842. /* Check for error conditions */
  843. errorstate = SDMMC_GetCmdResp2(SDIOx);
  844. return errorstate;
  845. }
  846. /**
  847. * @brief Send the Send CSD command and check the response.
  848. * @param SDIOx: Pointer to SDIO register base
  849. * @retval HAL status
  850. */
  851. uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
  852. {
  853. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  854. uint32_t errorstate = SDMMC_ERROR_NONE;
  855. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  856. sdmmc_cmdinit.Argument = 0U;
  857. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  858. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  859. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  860. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  861. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  862. /* Check for error conditions */
  863. errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  864. return errorstate;
  865. }
  866. /**
  867. * @brief Send the Status command and check the response.
  868. * @param SDIOx: Pointer to SDIO register base
  869. * @retval HAL status
  870. */
  871. uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
  872. {
  873. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  874. uint32_t errorstate = SDMMC_ERROR_NONE;
  875. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  876. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  877. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  878. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  879. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  880. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  881. /* Check for error conditions */
  882. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
  883. return errorstate;
  884. }
  885. /**
  886. * @brief Send the Status register command and check the response.
  887. * @param SDIOx: Pointer to SDIO register base
  888. * @retval HAL status
  889. */
  890. uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
  891. {
  892. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  893. uint32_t errorstate = SDMMC_ERROR_NONE;
  894. sdmmc_cmdinit.Argument = 0U;
  895. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  896. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  897. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  898. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  899. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  900. /* Check for error conditions */
  901. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
  902. return errorstate;
  903. }
  904. /**
  905. * @brief Sends host capacity support information and activates the card's
  906. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  907. * @param SDIOx: Pointer to SDIO register base
  908. * @parame Argument: Argument used for the command
  909. * @retval HAL status
  910. */
  911. uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
  912. {
  913. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  914. uint32_t errorstate = SDMMC_ERROR_NONE;
  915. sdmmc_cmdinit.Argument = Argument;
  916. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  917. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  918. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  919. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  920. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  921. /* Check for error conditions */
  922. errorstate = SDMMC_GetCmdResp3(SDIOx);
  923. return errorstate;
  924. }
  925. /**
  926. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
  927. * @param SDIOx: Pointer to SDIO register base
  928. * @parame Argument: Argument used for the command
  929. * @retval HAL status
  930. */
  931. uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
  932. {
  933. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  934. uint32_t errorstate = SDMMC_ERROR_NONE;
  935. sdmmc_cmdinit.Argument = Argument;
  936. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  937. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  938. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  939. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  940. SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  941. /* Check for error conditions */
  942. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
  943. return errorstate;
  944. }
  945. /**
  946. * @}
  947. */
  948. /* Private function ----------------------------------------------------------*/
  949. /** @addtogroup SD_Private_Functions
  950. * @{
  951. */
  952. /**
  953. * @brief Checks for error conditions for CMD0.
  954. * @param hsd: SD handle
  955. * @retval SD Card error state
  956. */
  957. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
  958. {
  959. /* 8 is the number of required instructions cycles for the below loop statement.
  960. The SDMMC_CMDTIMEOUT is expressed in ms */
  961. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  962. do
  963. {
  964. if (count-- == 0U)
  965. {
  966. return SDMMC_ERROR_TIMEOUT;
  967. }
  968. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
  969. /* Clear all the static flags */
  970. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  971. return SDMMC_ERROR_NONE;
  972. }
  973. /**
  974. * @brief Checks for error conditions for R1 response.
  975. * @param hsd: SD handle
  976. * @param SD_CMD: The sent command index
  977. * @retval SD Card error state
  978. */
  979. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
  980. {
  981. uint32_t response_r1;
  982. /* 8 is the number of required instructions cycles for the below loop statement.
  983. The Timeout is expressed in ms */
  984. register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
  985. do
  986. {
  987. if (count-- == 0U)
  988. {
  989. return SDMMC_ERROR_TIMEOUT;
  990. }
  991. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  992. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  993. {
  994. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  995. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  996. }
  997. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  998. {
  999. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1000. return SDMMC_ERROR_CMD_CRC_FAIL;
  1001. }
  1002. /* Check response received is of desired command */
  1003. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1004. {
  1005. return SDMMC_ERROR_CMD_CRC_FAIL;
  1006. }
  1007. /* Clear all the static flags */
  1008. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1009. /* We have received response, retrieve it for analysis */
  1010. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1011. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1012. {
  1013. return SDMMC_ERROR_NONE;
  1014. }
  1015. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1016. {
  1017. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1018. }
  1019. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1020. {
  1021. return SDMMC_ERROR_ADDR_MISALIGNED;
  1022. }
  1023. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1024. {
  1025. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1026. }
  1027. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1028. {
  1029. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1030. }
  1031. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1032. {
  1033. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1034. }
  1035. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1036. {
  1037. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1038. }
  1039. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1040. {
  1041. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1042. }
  1043. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1044. {
  1045. return SDMMC_ERROR_COM_CRC_FAILED;
  1046. }
  1047. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1048. {
  1049. return SDMMC_ERROR_ILLEGAL_CMD;
  1050. }
  1051. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1052. {
  1053. return SDMMC_ERROR_CARD_ECC_FAILED;
  1054. }
  1055. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1056. {
  1057. return SDMMC_ERROR_CC_ERR;
  1058. }
  1059. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1060. {
  1061. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1062. }
  1063. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1064. {
  1065. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1066. }
  1067. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1068. {
  1069. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1070. }
  1071. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1072. {
  1073. return SDMMC_ERROR_WP_ERASE_SKIP;
  1074. }
  1075. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1076. {
  1077. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1078. }
  1079. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1080. {
  1081. return SDMMC_ERROR_ERASE_RESET;
  1082. }
  1083. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1084. {
  1085. return SDMMC_ERROR_AKE_SEQ_ERR;
  1086. }
  1087. else
  1088. {
  1089. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1090. }
  1091. }
  1092. /**
  1093. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1094. * @param hsd: SD handle
  1095. * @retval SD Card error state
  1096. */
  1097. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
  1098. {
  1099. /* 8 is the number of required instructions cycles for the below loop statement.
  1100. The SDMMC_CMDTIMEOUT is expressed in ms */
  1101. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1102. do
  1103. {
  1104. if (count-- == 0U)
  1105. {
  1106. return SDMMC_ERROR_TIMEOUT;
  1107. }
  1108. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1109. if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1110. {
  1111. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1112. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1113. }
  1114. else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1115. {
  1116. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1117. return SDMMC_ERROR_CMD_CRC_FAIL;
  1118. }
  1119. else
  1120. {
  1121. /* No error flag set */
  1122. /* Clear all the static flags */
  1123. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1124. }
  1125. return SDMMC_ERROR_NONE;
  1126. }
  1127. /**
  1128. * @brief Checks for error conditions for R3 (OCR) response.
  1129. * @param hsd: SD handle
  1130. * @retval SD Card error state
  1131. */
  1132. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
  1133. {
  1134. /* 8 is the number of required instructions cycles for the below loop statement.
  1135. The SDMMC_CMDTIMEOUT is expressed in ms */
  1136. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1137. do
  1138. {
  1139. if (count-- == 0U)
  1140. {
  1141. return SDMMC_ERROR_TIMEOUT;
  1142. }
  1143. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1144. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1145. {
  1146. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1147. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1148. }
  1149. else
  1150. {
  1151. /* Clear all the static flags */
  1152. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1153. }
  1154. return SDMMC_ERROR_NONE;
  1155. }
  1156. /**
  1157. * @brief Checks for error conditions for R6 (RCA) response.
  1158. * @param hsd: SD handle
  1159. * @param SD_CMD: The sent command index
  1160. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1161. * address RCA
  1162. * @retval SD Card error state
  1163. */
  1164. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
  1165. {
  1166. uint32_t response_r1;
  1167. /* 8 is the number of required instructions cycles for the below loop statement.
  1168. The SDMMC_CMDTIMEOUT is expressed in ms */
  1169. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1170. do
  1171. {
  1172. if (count-- == 0U)
  1173. {
  1174. return SDMMC_ERROR_TIMEOUT;
  1175. }
  1176. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1177. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1178. {
  1179. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1180. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1181. }
  1182. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1183. {
  1184. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1185. return SDMMC_ERROR_CMD_CRC_FAIL;
  1186. }
  1187. /* Check response received is of desired command */
  1188. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1189. {
  1190. return SDMMC_ERROR_CMD_CRC_FAIL;
  1191. }
  1192. /* Clear all the static flags */
  1193. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
  1194. /* We have received response, retrieve it. */
  1195. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1196. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1197. {
  1198. *pRCA = (uint16_t) (response_r1 >> 16);
  1199. return SDMMC_ERROR_NONE;
  1200. }
  1201. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1202. {
  1203. return SDMMC_ERROR_ILLEGAL_CMD;
  1204. }
  1205. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1206. {
  1207. return SDMMC_ERROR_COM_CRC_FAILED;
  1208. }
  1209. else
  1210. {
  1211. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1212. }
  1213. }
  1214. /**
  1215. * @brief Checks for error conditions for R7 response.
  1216. * @param hsd: SD handle
  1217. * @retval SD Card error state
  1218. */
  1219. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
  1220. {
  1221. /* 8 is the number of required instructions cycles for the below loop statement.
  1222. The SDIO_CMDTIMEOUT is expressed in ms */
  1223. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1224. do
  1225. {
  1226. if (count-- == 0U)
  1227. {
  1228. return SDMMC_ERROR_TIMEOUT;
  1229. }
  1230. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
  1231. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1232. {
  1233. /* Card is SD V2.0 compliant */
  1234. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1235. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1236. }
  1237. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
  1238. {
  1239. /* Card is SD V2.0 compliant */
  1240. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1241. }
  1242. return SDMMC_ERROR_NONE;
  1243. }
  1244. /**
  1245. * @}
  1246. */
  1247. /**
  1248. * @}
  1249. */
  1250. #endif /* STM32F103xE || STM32F103xG */
  1251. #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
  1252. /**
  1253. * @}
  1254. */
  1255. /**
  1256. * @}
  1257. */
  1258. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/