stm32f1xx_hal_dac_ex.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667
  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_dac_ex.c
  4. * @author MCD Application Team
  5. * @brief DAC HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of DAC extension peripheral:
  8. * + Extended features functions
  9. *
  10. *
  11. @verbatim
  12. ==============================================================================
  13. ##### How to use this driver #####
  14. ==============================================================================
  15. [..]
  16. (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
  17. Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
  18. HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
  19. (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
  20. (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
  21. @endverbatim
  22. ******************************************************************************
  23. * @attention
  24. *
  25. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  26. *
  27. * Redistribution and use in source and binary forms, with or without modification,
  28. * are permitted provided that the following conditions are met:
  29. * 1. Redistributions of source code must retain the above copyright notice,
  30. * this list of conditions and the following disclaimer.
  31. * 2. Redistributions in binary form must reproduce the above copyright notice,
  32. * this list of conditions and the following disclaimer in the documentation
  33. * and/or other materials provided with the distribution.
  34. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  35. * may be used to endorse or promote products derived from this software
  36. * without specific prior written permission.
  37. *
  38. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  39. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  40. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  41. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  42. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  43. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  44. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  45. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  46. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48. *
  49. ******************************************************************************
  50. */
  51. /* Includes ------------------------------------------------------------------*/
  52. #include "stm32f1xx_hal.h"
  53. /** @addtogroup STM32F1xx_HAL_Driver
  54. * @{
  55. */
  56. /** @defgroup DACEx DACEx
  57. * @brief DACEx driver module
  58. * @{
  59. */
  60. #ifdef HAL_DAC_MODULE_ENABLED
  61. #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
  62. /* Private typedef -----------------------------------------------------------*/
  63. /* Private define ------------------------------------------------------------*/
  64. /* Private macro -------------------------------------------------------------*/
  65. /* Private variables ---------------------------------------------------------*/
  66. /* Private function prototypes -----------------------------------------------*/
  67. /* Exported functions --------------------------------------------------------*/
  68. /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
  69. * @{
  70. */
  71. /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
  72. * @brief Extended features functions
  73. *
  74. @verbatim
  75. ==============================================================================
  76. ##### Extended features functions #####
  77. ==============================================================================
  78. [..] This section provides functions allowing to:
  79. (+) Start conversion.
  80. (+) Stop conversion.
  81. (+) Start conversion and enable DMA transfer.
  82. (+) Stop conversion and disable DMA transfer.
  83. (+) Get result of conversion.
  84. (+) Get result of dual mode conversion.
  85. @endverbatim
  86. * @{
  87. */
  88. /**
  89. * @brief Returns the last data output value of the selected DAC channel.
  90. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  91. * the configuration information for the specified DAC.
  92. * @retval The selected DAC channel data output value.
  93. */
  94. uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
  95. {
  96. uint32_t tmp = 0U;
  97. tmp |= hdac->Instance->DOR1;
  98. tmp |= hdac->Instance->DOR2 << 16U;
  99. /* Returns the DAC channel data output register value */
  100. return tmp;
  101. }
  102. /**
  103. * @brief Enables or disables the selected DAC channel wave generation.
  104. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  105. * the configuration information for the specified DAC.
  106. * @param Channel: The selected DAC channel.
  107. * This parameter can be one of the following values:
  108. * DAC_CHANNEL_1 / DAC_CHANNEL_2
  109. * @param Amplitude: Select max triangle amplitude.
  110. * This parameter can be one of the following values:
  111. * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
  112. * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
  113. * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
  114. * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
  115. * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
  116. * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
  117. * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
  118. * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
  119. * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
  120. * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
  121. * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
  122. * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
  123. * @retval HAL status
  124. */
  125. HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  126. {
  127. /* Check the parameters */
  128. assert_param(IS_DAC_CHANNEL(Channel));
  129. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  130. /* Process locked */
  131. __HAL_LOCK(hdac);
  132. /* Change DAC state */
  133. hdac->State = HAL_DAC_STATE_BUSY;
  134. /* Enable the selected wave generation for the selected DAC channel */
  135. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
  136. /* Change DAC state */
  137. hdac->State = HAL_DAC_STATE_READY;
  138. /* Process unlocked */
  139. __HAL_UNLOCK(hdac);
  140. /* Return function status */
  141. return HAL_OK;
  142. }
  143. /**
  144. * @brief Enables or disables the selected DAC channel wave generation.
  145. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  146. * the configuration information for the specified DAC.
  147. * @param Channel: The selected DAC channel.
  148. * This parameter can be one of the following values:
  149. * DAC_CHANNEL_1 / DAC_CHANNEL_2
  150. * @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
  151. * This parameter can be one of the following values:
  152. * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
  153. * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
  154. * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
  155. * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
  156. * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
  157. * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
  158. * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
  159. * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
  160. * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
  161. * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
  162. * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
  163. * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
  164. * @retval HAL status
  165. */
  166. HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
  167. {
  168. /* Check the parameters */
  169. assert_param(IS_DAC_CHANNEL(Channel));
  170. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
  171. /* Process locked */
  172. __HAL_LOCK(hdac);
  173. /* Change DAC state */
  174. hdac->State = HAL_DAC_STATE_BUSY;
  175. /* Enable the selected wave generation for the selected DAC channel */
  176. MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
  177. /* Change DAC state */
  178. hdac->State = HAL_DAC_STATE_READY;
  179. /* Process unlocked */
  180. __HAL_UNLOCK(hdac);
  181. /* Return function status */
  182. return HAL_OK;
  183. }
  184. /**
  185. * @brief Set the specified data holding register value for dual DAC channel.
  186. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  187. * the configuration information for the specified DAC.
  188. * @param Alignment: Specifies the data alignment for dual channel DAC.
  189. * This parameter can be one of the following values:
  190. * DAC_ALIGN_8B_R: 8bit right data alignment selected
  191. * DAC_ALIGN_12B_L: 12bit left data alignment selected
  192. * DAC_ALIGN_12B_R: 12bit right data alignment selected
  193. * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
  194. * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
  195. * @note In dual mode, a unique register access is required to write in both
  196. * DAC channels at the same time.
  197. * @retval HAL status
  198. */
  199. HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
  200. {
  201. uint32_t data = 0U, tmp = 0U;
  202. /* Check the parameters */
  203. assert_param(IS_DAC_ALIGN(Alignment));
  204. assert_param(IS_DAC_DATA(Data1));
  205. assert_param(IS_DAC_DATA(Data2));
  206. /* Calculate and set dual DAC data holding register value */
  207. if (Alignment == DAC_ALIGN_8B_R)
  208. {
  209. data = ((uint32_t)Data2 << 8U) | Data1;
  210. }
  211. else
  212. {
  213. data = ((uint32_t)Data2 << 16U) | Data1;
  214. }
  215. tmp = (uint32_t)hdac->Instance;
  216. tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
  217. /* Set the dual DAC selected data holding register */
  218. *(__IO uint32_t *)tmp = data;
  219. /* Return function status */
  220. return HAL_OK;
  221. }
  222. /**
  223. * @brief Conversion complete callback in non blocking mode for Channel2
  224. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  225. * the configuration information for the specified DAC.
  226. * @retval None
  227. */
  228. __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  229. {
  230. /* Prevent unused argument(s) compilation warning */
  231. UNUSED(hdac);
  232. /* NOTE : This function Should not be modified, when the callback is needed,
  233. the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
  234. */
  235. }
  236. /**
  237. * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
  238. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  239. * the configuration information for the specified DAC.
  240. * @retval None
  241. */
  242. __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
  243. {
  244. /* Prevent unused argument(s) compilation warning */
  245. UNUSED(hdac);
  246. /* NOTE : This function Should not be modified, when the callback is needed,
  247. the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
  248. */
  249. }
  250. /**
  251. * @brief Error DAC callback for Channel2.
  252. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  253. * the configuration information for the specified DAC.
  254. * @retval None
  255. */
  256. __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
  257. {
  258. /* Prevent unused argument(s) compilation warning */
  259. UNUSED(hdac);
  260. /* NOTE : This function Should not be modified, when the callback is needed,
  261. the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
  262. */
  263. }
  264. #if defined (STM32F100xB) || defined (STM32F100xE)
  265. /**
  266. * @brief DMA underrun DAC callback for channel1.
  267. * Note: For STM32F100x devices with specific feature: DMA underrun.
  268. * On these devices, this function uses the interruption of DMA
  269. * underrun.
  270. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  271. * the configuration information for the specified DAC.
  272. * @retval None
  273. */
  274. __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
  275. {
  276. /* Prevent unused argument(s) compilation warning */
  277. UNUSED(hdac);
  278. /* NOTE : This function Should not be modified, when the callback is needed,
  279. the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
  280. */
  281. }
  282. /**
  283. * @brief DMA underrun DAC callback for channel2.
  284. * Note: For STM32F100x devices with specific feature: DMA underrun.
  285. * On these devices, this function uses the interruption of DMA
  286. * underrun.
  287. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  288. * the configuration information for the specified DAC.
  289. * @retval None
  290. */
  291. __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
  292. {
  293. /* Prevent unused argument(s) compilation warning */
  294. UNUSED(hdac);
  295. /* NOTE : This function Should not be modified, when the callback is needed,
  296. the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
  297. */
  298. }
  299. #endif /* STM32F100xB) || defined (STM32F100xE) */
  300. /**
  301. * @}
  302. */
  303. #if defined (STM32F100xB) || defined (STM32F100xE)
  304. /**
  305. * @brief Enables DAC and starts conversion of channel.
  306. * Note: For STM32F100x devices with specific feature: DMA underrun.
  307. * On these devices, this function enables the interruption of DMA
  308. * underrun.
  309. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  310. * the configuration information for the specified DAC.
  311. * @param Channel: The selected DAC channel.
  312. * This parameter can be one of the following values:
  313. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  314. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  315. * @param pData: The destination peripheral Buffer address.
  316. * @param Length: The length of data to be transferred from memory to DAC peripheral
  317. * @param Alignment: Specifies the data alignment for DAC channel.
  318. * This parameter can be one of the following values:
  319. * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
  320. * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
  321. * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
  322. * @retval HAL status
  323. */
  324. HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
  325. {
  326. uint32_t tmpreg = 0U;
  327. /* Check the parameters */
  328. assert_param(IS_DAC_CHANNEL(Channel));
  329. assert_param(IS_DAC_ALIGN(Alignment));
  330. /* Process locked */
  331. __HAL_LOCK(hdac);
  332. /* Change DAC state */
  333. hdac->State = HAL_DAC_STATE_BUSY;
  334. if(Channel == DAC_CHANNEL_1)
  335. {
  336. /* Set the DMA transfer complete callback for channel1 */
  337. hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
  338. /* Set the DMA half transfer complete callback for channel1 */
  339. hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
  340. /* Set the DMA error callback for channel1 */
  341. hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
  342. /* Enable the selected DAC channel1 DMA request */
  343. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  344. /* Case of use of channel 1 */
  345. switch(Alignment)
  346. {
  347. case DAC_ALIGN_12B_R:
  348. /* Get DHR12R1 address */
  349. tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
  350. break;
  351. case DAC_ALIGN_12B_L:
  352. /* Get DHR12L1 address */
  353. tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
  354. break;
  355. case DAC_ALIGN_8B_R:
  356. /* Get DHR8R1 address */
  357. tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
  358. break;
  359. default:
  360. break;
  361. }
  362. }
  363. else
  364. {
  365. /* Set the DMA transfer complete callback for channel2 */
  366. hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
  367. /* Set the DMA half transfer complete callback for channel2 */
  368. hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
  369. /* Set the DMA error callback for channel2 */
  370. hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
  371. /* Enable the selected DAC channel2 DMA request */
  372. SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  373. /* Case of use of channel 2 */
  374. switch(Alignment)
  375. {
  376. case DAC_ALIGN_12B_R:
  377. /* Get DHR12R2 address */
  378. tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
  379. break;
  380. case DAC_ALIGN_12B_L:
  381. /* Get DHR12L2 address */
  382. tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
  383. break;
  384. case DAC_ALIGN_8B_R:
  385. /* Get DHR8R2 address */
  386. tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
  387. break;
  388. default:
  389. break;
  390. }
  391. }
  392. /* Enable the DMA channel */
  393. if(Channel == DAC_CHANNEL_1)
  394. {
  395. /* Enable the DAC DMA underrun interrupt */
  396. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
  397. /* Enable the DMA channel */
  398. HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
  399. }
  400. else
  401. {
  402. /* Enable the DAC DMA underrun interrupt */
  403. __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
  404. /* Enable the DMA channel */
  405. HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
  406. }
  407. /* Enable the Peripharal */
  408. __HAL_DAC_ENABLE(hdac, Channel);
  409. /* Process Unlocked */
  410. __HAL_UNLOCK(hdac);
  411. /* Return function status */
  412. return HAL_OK;
  413. }
  414. #endif /* STM32F100xB) || defined (STM32F100xE) */
  415. #if defined (STM32F100xB) || defined (STM32F100xE)
  416. /**
  417. * @brief Disables DAC and stop conversion of channel.
  418. * Note: For STM32F100x devices with specific feature: DMA underrun.
  419. * On these devices, this function disables the interruption of DMA
  420. * underrun.
  421. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  422. * the configuration information for the specified DAC.
  423. * @param Channel: The selected DAC channel.
  424. * This parameter can be one of the following values:
  425. * @arg DAC_CHANNEL_1: DAC Channel1 selected
  426. * @arg DAC_CHANNEL_2: DAC Channel2 selected
  427. * @retval HAL status
  428. */
  429. HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
  430. {
  431. HAL_StatusTypeDef status = HAL_OK;
  432. /* Check the parameters */
  433. assert_param(IS_DAC_CHANNEL(Channel));
  434. /* Disable the selected DAC channel DMA request */
  435. hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
  436. /* Disable the Peripharal */
  437. __HAL_DAC_DISABLE(hdac, Channel);
  438. /* Disable the DMA Channel */
  439. /* Channel1 is used */
  440. if(Channel == DAC_CHANNEL_1)
  441. {
  442. /* Disable the DMA channel */
  443. status = HAL_DMA_Abort(hdac->DMA_Handle1);
  444. /* Disable the DAC DMA underrun interrupt */
  445. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
  446. }
  447. else /* Channel2 is used for */
  448. {
  449. /* Disable the DMA channel */
  450. status = HAL_DMA_Abort(hdac->DMA_Handle2);
  451. /* Disable the DAC DMA underrun interrupt */
  452. __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
  453. }
  454. /* Check if DMA Channel effectively disabled */
  455. if(status != HAL_OK)
  456. {
  457. /* Update ADC state machine to error */
  458. hdac->State = HAL_DAC_STATE_ERROR;
  459. }
  460. else
  461. {
  462. /* Change DAC state */
  463. hdac->State = HAL_DAC_STATE_READY;
  464. }
  465. /* Return function status */
  466. return status;
  467. }
  468. #endif /* STM32F100xB) || defined (STM32F100xE) */
  469. #if defined (STM32F100xB) || defined (STM32F100xE)
  470. /**
  471. * @brief Handles DAC interrupt request
  472. * Note: For STM32F100x devices with specific feature: DMA underrun.
  473. * On these devices, this function uses the interruption of DMA
  474. * underrun.
  475. * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
  476. * the configuration information for the specified DAC.
  477. * @retval None
  478. */
  479. void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
  480. {
  481. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
  482. {
  483. /* Check underrun flag of DAC channel 1 */
  484. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
  485. {
  486. /* Change DAC state to error state */
  487. hdac->State = HAL_DAC_STATE_ERROR;
  488. /* Set DAC error code to chanel1 DMA underrun error */
  489. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
  490. /* Clear the underrun flag */
  491. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
  492. /* Disable the selected DAC channel1 DMA request */
  493. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
  494. /* Error callback */
  495. HAL_DAC_DMAUnderrunCallbackCh1(hdac);
  496. }
  497. }
  498. if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
  499. {
  500. /* Check underrun flag of DAC channel 2 */
  501. if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
  502. {
  503. /* Change DAC state to error state */
  504. hdac->State = HAL_DAC_STATE_ERROR;
  505. /* Set DAC error code to channel2 DMA underrun error */
  506. SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
  507. /* Clear the underrun flag */
  508. __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
  509. /* Disable the selected DAC channel1 DMA request */
  510. CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
  511. /* Error callback */
  512. HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
  513. }
  514. }
  515. }
  516. #endif /* STM32F100xB || STM32F100xE */
  517. /**
  518. * @}
  519. */
  520. /** @defgroup DACEx_Private_Functions DACEx Private Functions
  521. * @{
  522. */
  523. /**
  524. * @brief DMA conversion complete callback.
  525. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  526. * the configuration information for the specified DMA module.
  527. * @retval None
  528. */
  529. void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
  530. {
  531. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  532. HAL_DACEx_ConvCpltCallbackCh2(hdac);
  533. hdac->State= HAL_DAC_STATE_READY;
  534. }
  535. /**
  536. * @brief DMA half transfer complete callback.
  537. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  538. * the configuration information for the specified DMA module.
  539. * @retval None
  540. */
  541. void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
  542. {
  543. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  544. /* Conversion complete callback */
  545. HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
  546. }
  547. /**
  548. * @brief DMA error callback
  549. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  550. * the configuration information for the specified DMA module.
  551. * @retval None
  552. */
  553. void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
  554. {
  555. DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  556. /* Set DAC error code to DMA error */
  557. hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
  558. HAL_DACEx_ErrorCallbackCh2(hdac);
  559. hdac->State= HAL_DAC_STATE_READY;
  560. }
  561. /**
  562. * @}
  563. */
  564. #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
  565. #endif /* HAL_DAC_MODULE_ENABLED */
  566. /**
  567. * @}
  568. */
  569. /**
  570. * @}
  571. */
  572. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/