stm32f1xx_ll_pwr.h 14 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F1xx_LL_PWR_H
  37. #define __STM32F1xx_LL_PWR_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f1xx.h"
  43. /** @addtogroup STM32F1xx_LL_Driver
  44. * @{
  45. */
  46. #if defined(PWR)
  47. /** @defgroup PWR_LL PWR
  48. * @{
  49. */
  50. /* Private types -------------------------------------------------------------*/
  51. /* Private variables ---------------------------------------------------------*/
  52. /* Private constants ---------------------------------------------------------*/
  53. /* Private macros ------------------------------------------------------------*/
  54. /* Exported types ------------------------------------------------------------*/
  55. /* Exported constants --------------------------------------------------------*/
  56. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  57. * @{
  58. */
  59. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  60. * @brief Flags defines which can be used with LL_PWR_WriteReg function
  61. * @{
  62. */
  63. #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
  64. #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
  65. /**
  66. * @}
  67. */
  68. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  69. * @brief Flags defines which can be used with LL_PWR_ReadReg function
  70. * @{
  71. */
  72. #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
  73. #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
  74. #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
  75. #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
  76. /**
  77. * @}
  78. */
  79. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  80. * @{
  81. */
  82. #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
  83. #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
  84. #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
  85. /**
  86. * @}
  87. */
  88. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
  89. * @{
  90. */
  91. #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
  92. #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
  93. /**
  94. * @}
  95. */
  96. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  97. * @{
  98. */
  99. #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
  100. #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
  101. #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
  102. #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
  103. #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
  104. #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
  105. #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
  106. #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
  107. /**
  108. * @}
  109. */
  110. /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
  111. * @{
  112. */
  113. #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
  114. /**
  115. * @}
  116. */
  117. /**
  118. * @}
  119. */
  120. /* Exported macro ------------------------------------------------------------*/
  121. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  122. * @{
  123. */
  124. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  125. * @{
  126. */
  127. /**
  128. * @brief Write a value in PWR register
  129. * @param __REG__ Register to be written
  130. * @param __VALUE__ Value to be written in the register
  131. * @retval None
  132. */
  133. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  134. /**
  135. * @brief Read a value in PWR register
  136. * @param __REG__ Register to be read
  137. * @retval Register value
  138. */
  139. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  140. /**
  141. * @}
  142. */
  143. /**
  144. * @}
  145. */
  146. /* Exported functions --------------------------------------------------------*/
  147. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  148. * @{
  149. */
  150. /** @defgroup PWR_LL_EF_Configuration Configuration
  151. * @{
  152. */
  153. /**
  154. * @brief Enable access to the backup domain
  155. * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
  156. * @retval None
  157. */
  158. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  159. {
  160. SET_BIT(PWR->CR, PWR_CR_DBP);
  161. }
  162. /**
  163. * @brief Disable access to the backup domain
  164. * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
  165. * @retval None
  166. */
  167. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  168. {
  169. CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  170. }
  171. /**
  172. * @brief Check if the backup domain is enabled
  173. * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
  174. * @retval State of bit (1 or 0).
  175. */
  176. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  177. {
  178. return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
  179. }
  180. /**
  181. * @brief Set voltage Regulator mode during deep sleep mode
  182. * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
  183. * @param RegulMode This parameter can be one of the following values:
  184. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  185. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  186. * @retval None
  187. */
  188. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  189. {
  190. MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  191. }
  192. /**
  193. * @brief Get voltage Regulator mode during deep sleep mode
  194. * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
  195. * @retval Returned value can be one of the following values:
  196. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  197. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  198. */
  199. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  200. {
  201. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  202. }
  203. /**
  204. * @brief Set Power Down mode when CPU enters deepsleep
  205. * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
  206. * @rmtoll CR LPDS LL_PWR_SetPowerMode
  207. * @param PDMode This parameter can be one of the following values:
  208. * @arg @ref LL_PWR_MODE_STOP_MAINREGU
  209. * @arg @ref LL_PWR_MODE_STOP_LPREGU
  210. * @arg @ref LL_PWR_MODE_STANDBY
  211. * @retval None
  212. */
  213. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  214. {
  215. MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
  216. }
  217. /**
  218. * @brief Get Power Down mode when CPU enters deepsleep
  219. * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
  220. * @rmtoll CR LPDS LL_PWR_GetPowerMode
  221. * @retval Returned value can be one of the following values:
  222. * @arg @ref LL_PWR_MODE_STOP_MAINREGU
  223. * @arg @ref LL_PWR_MODE_STOP_LPREGU
  224. * @arg @ref LL_PWR_MODE_STANDBY
  225. */
  226. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  227. {
  228. return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
  229. }
  230. /**
  231. * @brief Configure the voltage threshold detected by the Power Voltage Detector
  232. * @rmtoll CR PLS LL_PWR_SetPVDLevel
  233. * @param PVDLevel This parameter can be one of the following values:
  234. * @arg @ref LL_PWR_PVDLEVEL_0
  235. * @arg @ref LL_PWR_PVDLEVEL_1
  236. * @arg @ref LL_PWR_PVDLEVEL_2
  237. * @arg @ref LL_PWR_PVDLEVEL_3
  238. * @arg @ref LL_PWR_PVDLEVEL_4
  239. * @arg @ref LL_PWR_PVDLEVEL_5
  240. * @arg @ref LL_PWR_PVDLEVEL_6
  241. * @arg @ref LL_PWR_PVDLEVEL_7
  242. * @retval None
  243. */
  244. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  245. {
  246. MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  247. }
  248. /**
  249. * @brief Get the voltage threshold detection
  250. * @rmtoll CR PLS LL_PWR_GetPVDLevel
  251. * @retval Returned value can be one of the following values:
  252. * @arg @ref LL_PWR_PVDLEVEL_0
  253. * @arg @ref LL_PWR_PVDLEVEL_1
  254. * @arg @ref LL_PWR_PVDLEVEL_2
  255. * @arg @ref LL_PWR_PVDLEVEL_3
  256. * @arg @ref LL_PWR_PVDLEVEL_4
  257. * @arg @ref LL_PWR_PVDLEVEL_5
  258. * @arg @ref LL_PWR_PVDLEVEL_6
  259. * @arg @ref LL_PWR_PVDLEVEL_7
  260. */
  261. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  262. {
  263. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  264. }
  265. /**
  266. * @brief Enable Power Voltage Detector
  267. * @rmtoll CR PVDE LL_PWR_EnablePVD
  268. * @retval None
  269. */
  270. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  271. {
  272. SET_BIT(PWR->CR, PWR_CR_PVDE);
  273. }
  274. /**
  275. * @brief Disable Power Voltage Detector
  276. * @rmtoll CR PVDE LL_PWR_DisablePVD
  277. * @retval None
  278. */
  279. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  280. {
  281. CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  282. }
  283. /**
  284. * @brief Check if Power Voltage Detector is enabled
  285. * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
  286. * @retval State of bit (1 or 0).
  287. */
  288. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  289. {
  290. return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
  291. }
  292. /**
  293. * @brief Enable the WakeUp PINx functionality
  294. * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
  295. * @param WakeUpPin This parameter can be one of the following values:
  296. * @arg @ref LL_PWR_WAKEUP_PIN1
  297. * @retval None
  298. */
  299. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  300. {
  301. SET_BIT(PWR->CSR, WakeUpPin);
  302. }
  303. /**
  304. * @brief Disable the WakeUp PINx functionality
  305. * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
  306. * @param WakeUpPin This parameter can be one of the following values:
  307. * @arg @ref LL_PWR_WAKEUP_PIN1
  308. * @retval None
  309. */
  310. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  311. {
  312. CLEAR_BIT(PWR->CSR, WakeUpPin);
  313. }
  314. /**
  315. * @brief Check if the WakeUp PINx functionality is enabled
  316. * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
  317. * @param WakeUpPin This parameter can be one of the following values:
  318. * @arg @ref LL_PWR_WAKEUP_PIN1
  319. * @retval State of bit (1 or 0).
  320. */
  321. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  322. {
  323. return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
  324. }
  325. /**
  326. * @}
  327. */
  328. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  329. * @{
  330. */
  331. /**
  332. * @brief Get Wake-up Flag
  333. * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
  334. * @retval State of bit (1 or 0).
  335. */
  336. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  337. {
  338. return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
  339. }
  340. /**
  341. * @brief Get Standby Flag
  342. * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
  343. * @retval State of bit (1 or 0).
  344. */
  345. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  346. {
  347. return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
  348. }
  349. /**
  350. * @brief Indicate whether VDD voltage is below the selected PVD threshold
  351. * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
  352. * @retval State of bit (1 or 0).
  353. */
  354. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  355. {
  356. return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
  357. }
  358. /**
  359. * @brief Clear Standby Flag
  360. * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
  361. * @retval None
  362. */
  363. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  364. {
  365. SET_BIT(PWR->CR, PWR_CR_CSBF);
  366. }
  367. /**
  368. * @brief Clear Wake-up Flags
  369. * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
  370. * @retval None
  371. */
  372. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  373. {
  374. SET_BIT(PWR->CR, PWR_CR_CWUF);
  375. }
  376. /**
  377. * @}
  378. */
  379. #if defined(USE_FULL_LL_DRIVER)
  380. /** @defgroup PWR_LL_EF_Init De-initialization function
  381. * @{
  382. */
  383. ErrorStatus LL_PWR_DeInit(void);
  384. /**
  385. * @}
  386. */
  387. #endif /* USE_FULL_LL_DRIVER */
  388. /**
  389. * @}
  390. */
  391. /**
  392. * @}
  393. */
  394. #endif /* defined(PWR) */
  395. /**
  396. * @}
  397. */
  398. #ifdef __cplusplus
  399. }
  400. #endif
  401. #endif /* __STM32F1xx_LL_PWR_H */
  402. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/