stm32f1xx_hal_pcd.h 34 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F1xx_HAL_PCD_H
  37. #define __STM32F1xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. #if defined(STM32F102x6) || defined(STM32F102xB) || \
  42. defined(STM32F103x6) || defined(STM32F103xB) || \
  43. defined(STM32F103xE) || defined(STM32F103xG) || \
  44. defined(STM32F105xC) || defined(STM32F107xC)
  45. /* Includes ------------------------------------------------------------------*/
  46. #include "stm32f1xx_ll_usb.h"
  47. /** @addtogroup STM32F1xx_HAL_Driver
  48. * @{
  49. */
  50. /** @addtogroup PCD
  51. * @{
  52. */
  53. /* Exported types ------------------------------------------------------------*/
  54. /** @defgroup PCD_Exported_Types PCD Exported Types
  55. * @{
  56. */
  57. /**
  58. * @brief PCD State structure definition
  59. */
  60. typedef enum
  61. {
  62. HAL_PCD_STATE_RESET = 0x00U,
  63. HAL_PCD_STATE_READY = 0x01U,
  64. HAL_PCD_STATE_ERROR = 0x02U,
  65. HAL_PCD_STATE_BUSY = 0x03U,
  66. HAL_PCD_STATE_TIMEOUT = 0x04U
  67. } PCD_StateTypeDef;
  68. #if defined (USB)
  69. /**
  70. * @brief PCD double buffered endpoint direction
  71. */
  72. typedef enum
  73. {
  74. PCD_EP_DBUF_OUT,
  75. PCD_EP_DBUF_IN,
  76. PCD_EP_DBUF_ERR,
  77. }PCD_EP_DBUF_DIR;
  78. /**
  79. * @brief PCD endpoint buffer number
  80. */
  81. typedef enum
  82. {
  83. PCD_EP_NOBUF,
  84. PCD_EP_BUF0,
  85. PCD_EP_BUF1
  86. }PCD_EP_BUF_NUM;
  87. #endif /* USB */
  88. #if defined (USB_OTG_FS)
  89. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  90. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  91. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  92. #endif /* USB_OTG_FS */
  93. #if defined (USB)
  94. typedef USB_TypeDef PCD_TypeDef;
  95. typedef USB_CfgTypeDef PCD_InitTypeDef;
  96. typedef USB_EPTypeDef PCD_EPTypeDef;
  97. #endif /* USB */
  98. /**
  99. * @brief PCD Handle Structure definition
  100. */
  101. typedef struct
  102. {
  103. PCD_TypeDef *Instance; /*!< Register base address */
  104. PCD_InitTypeDef Init; /*!< PCD required parameters */
  105. __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */
  106. PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
  107. PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
  108. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  109. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  110. uint32_t Setup[12U]; /*!< Setup packet buffer */
  111. void *pData; /*!< Pointer to upper stack Handler */
  112. } PCD_HandleTypeDef;
  113. /**
  114. * @}
  115. */
  116. /* Include PCD HAL Extension module */
  117. #include "stm32f1xx_hal_pcd_ex.h"
  118. /* Exported constants --------------------------------------------------------*/
  119. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  120. * @{
  121. */
  122. /** @defgroup PCD_Speed PCD Speed
  123. * @{
  124. */
  125. #define PCD_SPEED_HIGH 0U /* Not Supported */
  126. #define PCD_SPEED_HIGH_IN_FULL 1U /* Not Supported */
  127. #define PCD_SPEED_FULL 2U
  128. /**
  129. * @}
  130. */
  131. /** @defgroup PCD_PHY_Module PCD PHY Module
  132. * @{
  133. */
  134. #define PCD_PHY_EMBEDDED 2U
  135. /**
  136. * @}
  137. */
  138. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  139. * @{
  140. */
  141. #ifndef USBD_FS_TRDT_VALUE
  142. #define USBD_FS_TRDT_VALUE 5U
  143. #endif /* USBD_FS_TRDT_VALUE */
  144. /**
  145. * @}
  146. */
  147. /**
  148. * @}
  149. */
  150. /* Exported macros -----------------------------------------------------------*/
  151. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  152. * @brief macros to handle interrupts and specific clock configurations
  153. * @{
  154. */
  155. #if defined (USB_OTG_FS)
  156. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  157. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  158. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  159. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
  160. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
  161. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  162. ~(USB_OTG_PCGCCTL_STOPCLK)
  163. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  164. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
  165. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
  166. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  167. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  168. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
  169. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  170. do{ \
  171. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  172. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  173. } while(0U)
  174. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
  175. do{ \
  176. EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE); \
  177. EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  178. } while(0U)
  179. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
  180. do{ \
  181. EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  182. EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
  183. EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  184. EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
  185. } while(0U)
  186. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
  187. #endif /* USB_OTG_FS */
  188. #if defined (USB)
  189. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  190. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  191. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  192. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  193. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  194. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  195. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  196. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  197. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  198. do{ \
  199. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  200. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  201. } while(0U)
  202. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \
  203. do{ \
  204. EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \
  205. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  206. } while(0U)
  207. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \
  208. do{ \
  209. EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  210. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  211. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  212. EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \
  213. } while(0U)
  214. #endif /* USB */
  215. /**
  216. * @}
  217. */
  218. /* Exported functions --------------------------------------------------------*/
  219. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  220. * @{
  221. */
  222. /* Initialization/de-initialization functions ********************************/
  223. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  224. * @{
  225. */
  226. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  227. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  228. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  229. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  230. /**
  231. * @}
  232. */
  233. /* I/O operation functions ***************************************************/
  234. /* Non-Blocking mode: Interrupt */
  235. /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
  236. * @{
  237. */
  238. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  239. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  240. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  241. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  242. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  243. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  244. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  245. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  246. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  247. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  249. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  250. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  251. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  252. /**
  253. * @}
  254. */
  255. /* Peripheral Control functions **********************************************/
  256. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  257. * @{
  258. */
  259. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  260. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  261. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  262. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  263. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  264. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  265. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  266. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  267. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  268. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  269. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  270. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  271. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  272. /**
  273. * @}
  274. */
  275. /* Peripheral State functions ************************************************/
  276. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  277. * @{
  278. */
  279. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  280. /**
  281. * @}
  282. */
  283. /**
  284. * @}
  285. */
  286. /* Private constants ---------------------------------------------------------*/
  287. /** @defgroup PCD_Private_Constants PCD Private Constants
  288. * @{
  289. */
  290. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  291. * @{
  292. */
  293. #if defined (USB_OTG_FS)
  294. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
  295. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
  296. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
  297. #define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */
  298. #endif /* USB_OTG_FS */
  299. #if defined (USB)
  300. #define USB_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */
  301. #endif /* USB */
  302. /**
  303. * @}
  304. */
  305. #if defined (USB)
  306. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  307. * @{
  308. */
  309. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  310. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  311. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  312. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  313. /**
  314. * @}
  315. */
  316. /** @defgroup PCD_ENDP PCD ENDP
  317. * @{
  318. */
  319. #define PCD_ENDP0 ((uint8_t)0)
  320. #define PCD_ENDP1 ((uint8_t)1)
  321. #define PCD_ENDP2 ((uint8_t)2)
  322. #define PCD_ENDP3 ((uint8_t)3)
  323. #define PCD_ENDP4 ((uint8_t)4)
  324. #define PCD_ENDP5 ((uint8_t)5)
  325. #define PCD_ENDP6 ((uint8_t)6)
  326. #define PCD_ENDP7 ((uint8_t)7)
  327. /**
  328. * @}
  329. */
  330. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  331. * @{
  332. */
  333. #define PCD_SNG_BUF 0U
  334. #define PCD_DBL_BUF 1U
  335. /**
  336. * @}
  337. */
  338. #endif /* USB */
  339. /**
  340. * @}
  341. */
  342. /* Private macros ------------------------------------------------------------*/
  343. /** @addtogroup PCD_Private_Macros PCD Private Macros
  344. * @{
  345. */
  346. #if defined (USB)
  347. /* SetENDPOINT */
  348. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2U)= (uint16_t)(wRegValue))
  349. /* GetENDPOINT */
  350. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2U))
  351. /* ENDPOINT transfer */
  352. #define USB_EP0StartXfer USB_EPStartXfer
  353. /**
  354. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  355. * @param USBx: USB peripheral instance register address.
  356. * @param bEpNum: Endpoint Number.
  357. * @param wType: Endpoint Type.
  358. * @retval None
  359. */
  360. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  361. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  362. /**
  363. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  364. * @param USBx: USB peripheral instance register address.
  365. * @param bEpNum: Endpoint Number.
  366. * @retval Endpoint Type
  367. */
  368. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  369. /**
  370. * @brief free buffer used from the application realizing it to the line
  371. toggles bit SW_BUF in the double buffered endpoint register
  372. * @param USBx: USB peripheral instance register address.
  373. * @param bEpNum: Endpoint Number.
  374. * @param bDir: Direction
  375. * @retval None
  376. */
  377. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  378. {\
  379. if ((bDir) == PCD_EP_DBUF_OUT)\
  380. { /* OUT double buffered endpoint */\
  381. PCD_TX_DTOG((USBx), (bEpNum));\
  382. }\
  383. else if ((bDir) == PCD_EP_DBUF_IN)\
  384. { /* IN double buffered endpoint */\
  385. PCD_RX_DTOG((USBx), (bEpNum));\
  386. }\
  387. }
  388. /**
  389. * @brief gets direction of the double buffered endpoint
  390. * @param USBx: USB peripheral instance register address.
  391. * @param bEpNum: Endpoint Number.
  392. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  393. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  394. */
  395. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  396. {\
  397. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  398. return(PCD_EP_DBUF_OUT);\
  399. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  400. return(PCD_EP_DBUF_IN);\
  401. else\
  402. return(PCD_EP_DBUF_ERR);\
  403. }
  404. /**
  405. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  406. * @param USBx: USB peripheral instance register address.
  407. * @param bEpNum: Endpoint Number.
  408. * @param wState: new state
  409. * @retval None
  410. */
  411. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  412. \
  413. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  414. /* toggle first bit ? */ \
  415. if((USB_EPTX_DTOG1 & (wState))!= 0U)\
  416. { \
  417. _wRegVal ^= USB_EPTX_DTOG1; \
  418. } \
  419. /* toggle second bit ? */ \
  420. if((USB_EPTX_DTOG2 & (wState))!= 0U) \
  421. { \
  422. _wRegVal ^= USB_EPTX_DTOG2; \
  423. } \
  424. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  425. } /* PCD_SET_EP_TX_STATUS */
  426. /**
  427. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  428. * @param USBx: USB peripheral instance register address.
  429. * @param bEpNum: Endpoint Number.
  430. * @param wState: new state
  431. * @retval None
  432. */
  433. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  434. register uint16_t _wRegVal; \
  435. \
  436. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  437. /* toggle first bit ? */ \
  438. if((USB_EPRX_DTOG1 & (wState))!= 0U) \
  439. { \
  440. _wRegVal ^= USB_EPRX_DTOG1; \
  441. } \
  442. /* toggle second bit ? */ \
  443. if((USB_EPRX_DTOG2 & (wState))!= 0U) \
  444. { \
  445. _wRegVal ^= USB_EPRX_DTOG2; \
  446. } \
  447. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  448. } /* PCD_SET_EP_RX_STATUS */
  449. /**
  450. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  451. * @param USBx: USB peripheral instance register address.
  452. * @param bEpNum: Endpoint Number.
  453. * @param wStaterx: new state.
  454. * @param wStatetx: new state.
  455. * @retval None
  456. */
  457. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  458. register uint32_t _wRegVal; \
  459. \
  460. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  461. /* toggle first bit ? */ \
  462. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
  463. { \
  464. _wRegVal ^= USB_EPRX_DTOG1; \
  465. } \
  466. /* toggle second bit ? */ \
  467. if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  468. { \
  469. _wRegVal ^= USB_EPRX_DTOG2; \
  470. } \
  471. /* toggle first bit ? */ \
  472. if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  473. { \
  474. _wRegVal ^= USB_EPTX_DTOG1; \
  475. } \
  476. /* toggle second bit ? */ \
  477. if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  478. { \
  479. _wRegVal ^= USB_EPTX_DTOG2; \
  480. } \
  481. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  482. } /* PCD_SET_EP_TXRX_STATUS */
  483. /**
  484. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  485. * /STAT_RX[1:0])
  486. * @param USBx: USB peripheral instance register address.
  487. * @param bEpNum: Endpoint Number.
  488. * @retval status
  489. */
  490. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  491. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  492. /**
  493. * @brief sets directly the VALID tx/rx-status into the endpoint register
  494. * @param USBx: USB peripheral instance register address.
  495. * @param bEpNum: Endpoint Number.
  496. * @retval None
  497. */
  498. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  499. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  500. /**
  501. * @brief checks stall condition in an endpoint.
  502. * @param USBx: USB peripheral instance register address.
  503. * @param bEpNum: Endpoint Number.
  504. * @retval TRUE = endpoint in stall condition.
  505. */
  506. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  507. == USB_EP_TX_STALL)
  508. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  509. == USB_EP_RX_STALL)
  510. /**
  511. * @brief set & clear EP_KIND bit.
  512. * @param USBx: USB peripheral instance register address.
  513. * @param bEpNum: Endpoint Number.
  514. * @retval None
  515. */
  516. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  517. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  518. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  519. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  520. /**
  521. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  522. * @param USBx: USB peripheral instance register address.
  523. * @param bEpNum: Endpoint Number.
  524. * @retval None
  525. */
  526. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  527. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  528. /**
  529. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  530. * @param USBx: USB peripheral instance register address.
  531. * @param bEpNum: Endpoint Number.
  532. * @retval None
  533. */
  534. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  535. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  536. /**
  537. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  538. * @param USBx: USB peripheral instance register address.
  539. * @param bEpNum: Endpoint Number.
  540. * @retval None
  541. */
  542. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  543. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
  544. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  545. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
  546. /**
  547. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  548. * @param USBx: USB peripheral instance register address.
  549. * @param bEpNum: Endpoint Number.
  550. * @retval None
  551. */
  552. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  553. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  554. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  555. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  556. /**
  557. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  558. * @param USBx: USB peripheral instance register address.
  559. * @param bEpNum: Endpoint Number.
  560. * @retval None
  561. */
  562. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0U)\
  563. { \
  564. PCD_RX_DTOG((USBx), (bEpNum)); \
  565. }
  566. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0U)\
  567. { \
  568. PCD_TX_DTOG((USBx), (bEpNum)); \
  569. }
  570. /**
  571. * @brief Sets address in an endpoint register.
  572. * @param USBx: USB peripheral instance register address.
  573. * @param bEpNum: Endpoint Number.
  574. * @param bAddr: Address.
  575. * @retval None
  576. */
  577. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  578. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  579. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  580. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  581. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+2U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  582. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+4U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  583. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+6U)*2U+ ((uint32_t)(USBx) + 0x400U)))
  584. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  585. uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  586. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  587. }
  588. /**
  589. * @brief sets address of the tx/rx buffer.
  590. * @param USBx: USB peripheral instance register address.
  591. * @param bEpNum: Endpoint Number.
  592. * @param wAddr: address to be set (must be word aligned).
  593. * @retval None
  594. */
  595. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  596. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
  597. /**
  598. * @brief Gets address of the tx/rx buffer.
  599. * @param USBx: USB peripheral instance register address.
  600. * @param bEpNum: Endpoint Number.
  601. * @retval address of the buffer.
  602. */
  603. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  604. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  605. /**
  606. * @brief Sets counter of rx buffer with no. of blocks.
  607. * @param dwReg: Register
  608. * @param wCount: Counter.
  609. * @param wNBlocks: no. of Blocks.
  610. * @retval None
  611. */
  612. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  613. (wNBlocks) = (wCount) >> 5U;\
  614. if(((wCount) & 0x1FU) == 0U)\
  615. { \
  616. (wNBlocks)--;\
  617. } \
  618. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | 0x8000U); \
  619. }/* PCD_CALC_BLK32 */
  620. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  621. (wNBlocks) = (wCount) >> 1U;\
  622. if(((wCount) & 0x01U) != 0U)\
  623. { \
  624. (wNBlocks)++;\
  625. } \
  626. *pdwReg = (uint16_t)((wNBlocks) << 10U);\
  627. }/* PCD_CALC_BLK2 */
  628. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  629. uint16_t wNBlocks;\
  630. if((wCount) > 62U) \
  631. { \
  632. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  633. } \
  634. else \
  635. { \
  636. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  637. } \
  638. }/* PCD_SET_EP_CNT_RX_REG */
  639. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  640. uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  641. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  642. }
  643. /**
  644. * @brief sets counter for the tx/rx buffer.
  645. * @param USBx: USB peripheral instance register address.
  646. * @param bEpNum: Endpoint Number.
  647. * @param wCount: Counter value.
  648. * @retval None
  649. */
  650. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  651. /**
  652. * @brief gets counter of the tx buffer.
  653. * @param USBx: USB peripheral instance register address.
  654. * @param bEpNum: Endpoint Number.
  655. * @retval Counter value
  656. */
  657. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3FFU)
  658. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3FFU)
  659. /**
  660. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  661. * @param USBx: USB peripheral instance register address.
  662. * @param bEpNum: Endpoint Number.
  663. * @param wBuf0Addr: buffer 0 address.
  664. * @retval Counter value
  665. */
  666. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  667. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  668. /**
  669. * @brief Sets addresses in a double buffer endpoint.
  670. * @param USBx: USB peripheral instance register address.
  671. * @param bEpNum: Endpoint Number.
  672. * @param wBuf0Addr: buffer 0 address.
  673. * @param wBuf1Addr = buffer 1 address.
  674. * @retval None
  675. */
  676. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  677. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  678. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  679. } /* PCD_SET_EP_DBUF_ADDR */
  680. /**
  681. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  682. * @param USBx: USB peripheral instance register address.
  683. * @param bEpNum: Endpoint Number.
  684. * @retval None
  685. */
  686. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  687. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  688. /**
  689. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  690. * @param USBx: USB peripheral instance register address.
  691. * @param bEpNum: Endpoint Number.
  692. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  693. * EP_DBUF_IN = IN
  694. * @param wCount: Counter value
  695. * @retval None
  696. */
  697. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  698. if((bDir) == PCD_EP_DBUF_OUT)\
  699. /* OUT endpoint */ \
  700. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  701. else if((bDir) == PCD_EP_DBUF_IN)\
  702. /* IN endpoint */ \
  703. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  704. } /* SetEPDblBuf0Count*/
  705. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  706. if((bDir) == PCD_EP_DBUF_OUT)\
  707. {/* OUT endpoint */ \
  708. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  709. } \
  710. else if((bDir) == PCD_EP_DBUF_IN)\
  711. {/* IN endpoint */ \
  712. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  713. } \
  714. } /* SetEPDblBuf1Count */
  715. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  716. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  717. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  718. } /* PCD_SET_EP_DBUF_CNT */
  719. /**
  720. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  721. * @param USBx: USB peripheral instance register address.
  722. * @param bEpNum: Endpoint Number.
  723. * @retval None
  724. */
  725. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  726. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  727. #endif /* USB */
  728. /** @defgroup PCD_Instance_definition PCD Instance definition
  729. * @{
  730. */
  731. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  732. /**
  733. * @}
  734. */
  735. /**
  736. * @}
  737. */
  738. /**
  739. * @}
  740. */
  741. /**
  742. * @}
  743. */
  744. #endif /* STM32F102x6 || STM32F102xB || */
  745. /* STM32F103x6 || STM32F103xB || */
  746. /* STM32F103xE || STM32F103xG || */
  747. /* STM32F105xC || STM32F107xC */
  748. #ifdef __cplusplus
  749. }
  750. #endif
  751. #endif /* __STM32F1xx_HAL_PCD_H */
  752. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/